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CPU Reset 后的前100多条指令
1 D/ h) l: G, k9 N# t测试平台： Intel Menlow Crown Bench CRB, B% L9 R& j* s% E, S) v
BIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
# Y4 F) {% q* | y6 q9 tF000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa4 K/ i2 X+ p5 q
EAX = 00000000: AX=0000 AH=00 AL=00
4 v5 ^( G3 L0 v, e% NEBX = 00000000: BX=0000 BH=00 BL=00
: x# s% D# E$ f2 [; p: mECX = 00000000: CX=0000 CH=00 CL=00 % s" I7 S( X, M) i
EDX = 000106C0: DX=06C0 DH=06 DL=C0
% Q) j5 ]: E. \$ k1 w' T6 WEBP = 00000000: BP=0000
, [& s1 D1 |* h6 T$ q% m8 m) M8 SESI = 00000000: SI=0000
1 b4 \! O6 m7 F) SEDI = 00000000: DI=0000 6 l \# O7 m& ?$ U. @
ESP = 00000000: SP=0000
. m4 S6 J$ G7 \$ s. r( ^CS = F000
d; C) C& l+ G& x2 t/ \" I+ @DS = 0000
/ x9 r7 b8 h3 z d, Z! eSS = 0000
) T( A0 u" f0 I$ x+ |2 D5 PES = 00005 [: W9 M9 q$ j/ H1 p7 W
FS = 0000
" n4 l! ~' J% TGS = 0000
3 u# x- A/ q9 L" o s* XEIP = 0000FFF0: IP=FFF0
* H5 ?, \: r9 r' S* @# ?& cEFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
6 p/ j+ M7 I% r- Q# X9 ]! H" r2 s- FCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0 ( H: S% C m( }! E9 b { |+ I5 J
CR2 = 00000000+ P) g% m* I8 y$ w! |. [# u
CR3 = 00000000: PCD=0 PWT=0
+ S6 D% v! S a+ U( |# b: ?CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 ' c5 O* n5 ^* d0 n! Z/ W
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Instruction for CPU step 00
" |8 |- ?% A! M/ y B$ n7 fF000:FFAA E9C300 JMP near16 ptr 0070
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Instruction for CPU step 01
8 a3 P, M* B. xF000:0070 E9FD01 JMP near16 ptr 0270 X* e9 V' \2 l$ b8 O; `
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Instruction for CPU step 020 T( M: v8 q! A- T
F000:0270 FA CLI
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Instruction for CPU step 03
9 u# Y( g$ z+ F4 W# PF000:0271 FC CLD & Y- b7 D5 w: F" E5 J
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Instruction for CPU step 04
6 `! I) U: k o0 G# FF000:0272 668BE0 MOV ESP,EAX 6 N4 f- d' i1 T! o1 K k
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Instruction for CPU step 056 U0 h: f! E! x
F000:0275 8CC8 MOV AX,CS : V8 s3 A7 _7 h; J0 `) G" m! M/ n
! Y. Q' e% {! o2 AInstruction for CPU step 06
$ I7 i# Y1 L) P1 e& g4 k9 uF000:0277 8ED0 MOV SS,AX . Y5 c2 ^, n, E' _1 k$ k
1 ]3 Q/ Y7 G# p6 d$ O8 W- RInstruction for CPU step 07
; r4 ^+ s. J" V, |9 w1 G) _5 B! q6 n$ jF000:027C E957FE JMP near16 ptr 00d66 {' E+ S6 y* T0 `* o3 P
+ [" w3 C$ j: CInstruction for CPU step 08! g( w; o2 L C7 l
F000:00D6 E9A601 JMP near16 ptr 027f
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Instruction for CPU step 097 w% Z. F" l/ P, M& N2 a
F000:027F B0D0 MOV AL,d0 * X7 H( J8 D/ H! X. D
3 W. z, ] K2 h- f% ^* \% EInstruction for CPU step 10
; _# O3 J2 [* Z1 O! YF000:0281 E680 OUT 80,AL 2 A! `4 M: V, l) c
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Instruction for CPU step 11
4 o1 F& H* O/ v) u. |% v; q t* [F000:0283 BF8902 MOV DI,0289
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Instruction for CPU step 12" ~* V2 B# S7 l) M' p, i6 J9 N
F000:0286 E9AE06 JMP near16 ptr 0937- t4 |: r0 f' K, L: x9 V: _: X6 d
, ]( v: ^* `/ Y; t. |) y$ }+ \- R7 X; `Instruction for CPU step 13
( Y3 V) G( t% M8 Y) KF000:0937 0F08 INVD
0 {( A7 Q- S* b. P1 A1 v& o ( p5 I3 S* @. z6 {9 g/ D
Instruction for CPU step 14
& y3 c4 B) k QF000:0939 0F6EFF MOVD MM7,EDI ' b+ D" a: w. H1 R' W1 C& |: [
. ?& V; h5 ~0 B4 I PInstruction for CPU step 15
+ I2 C8 Y6 Y% m& `9 V- cF000:093C 668BC4 MOV EAX,ESP
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Instruction for CPU step 16, Y' ^8 {0 C) Y! e# y; }5 T
F000:093F E97C08 JMP near16 ptr 11be
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Instruction for CPU step 179 E; r/ }+ z* F. @/ N! s/ A# ^2 H
F000:11BE E981F7 JMP near16 ptr 0942& {% _% k! y0 q# S
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Instruction for CPU step 18
) n, _2 q0 g, _' rF000:0942 BF4809 MOV DI,0948 ; p. W' U( t' ^& b6 L
O9 S& {. D( J3 h+ b7 vInstruction for CPU step 194 X3 \+ H/ T4 y. b% @0 ]5 R) H$ a
F000:0945 E9C004 JMP near16 ptr 0e08
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Instruction for CPU step 20
; \' s" i# F; cF000:0E08 0F20C0 MOV EAX,CR0 ! ?7 d3 |7 t+ G0 L9 ^
4 _+ m6 U3 k/ h& s* |Instruction for CPU step 216 u4 `# U# E; O4 g4 A2 u* m
F000:0E0B 660D00000060 OR EAX,60000000
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' ?1 x* W X; Z) Z5 aInstruction for CPU step 22
. y! M) c( ~$ }- pF000:0E11 0F22C0 MOV CR0,EAX + t) d! U( n( s5 n! D
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Instruction for CPU step 231 v) `0 P3 {- y9 I2 a+ O3 F# q* Y
F000:0E14 0F09 WBINVD ; _: g. i. f- b7 B; U7 F& Y
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Instruction for CPU step 24
" h9 h" j4 V* P8 z" YF000:0E16 66B9FF020000 MOV ECX,000002ff
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Instruction for CPU step 25
2 v' A3 Y5 e) i( I3 u% KF000:0E1C 0F32 RDMSR
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Instruction for CPU step 269 u8 F0 C7 @0 G c: }3 ^
F000:0E1E 25FFF3 AND AX,f3ff $ d! W9 S, Z x& k9 L& w
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Instruction for CPU step 27% O% F5 S( g" f$ v
F000:0E21 0F30 WRMSR
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Instruction for CPU step 28
8 u0 [& G0 J% H, S) X2 @F000:0E23 0F09 WBINVD
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Instruction for CPU step 29
2 p0 Y8 y+ T' Y. g0 k+ ?6 LF000:0E25 0F20E0 MOV EAX,CR4
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5 K$ ^( w4 l4 Y, mInstruction for CPU step 30
8 h* l- R, c/ O) w( `6 E5 rF000:0E28 247F AND AL,7f & t1 T2 z- w! k, i9 a
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Instruction for CPU step 31 U, Q4 `- u; u9 Z+ l
F000:0E2A 0F22E0 MOV CR4,EAX
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! B9 I& n+ v) O% j6 }% T' {; MInstruction for CPU step 32
# {4 P/ M1 h k/ f: H5 d+ NF000:0E2D 0F20D8 MOV EAX,CR3
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# \% c8 a) u, P/ c. h6 hInstruction for CPU step 33! w: T% d- B) D4 ~7 _' H8 J
F000:0E30 0F22D8 MOV CR3,EAX
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Instruction for CPU step 34
. |0 J7 o1 t M, d5 _' JF000:0E33 FFE7 JMP DI
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Instruction for CPU step 35$ T$ {$ [1 u* z: ?$ a0 H n. o
F000:0948 66B9FE000000 MOV ECX,000000fe
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Instruction for CPU step 36' Z% M$ S- ?- B( f" F+ t7 V
F000:094E 0F32 RDMSR
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$ H' c( t7 o6 O( c9 B% M# rInstruction for CPU step 37" r# y' L8 ^. {6 n0 l, z3 y! W
F000:0950 0FB6D8 MOVZX BX,AL % k: S8 C% ^6 ~. t
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Instruction for CPU step 38
2 K/ Y- |! k+ v1 i# S- l' I, O8 d* wF000:0953 6633C0 XOR EAX,EAX
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/ Q f" U8 D9 [3 T# i ~" ^: iInstruction for CPU step 39, P' O( p7 ]4 x
F000:0956 668BD0 MOV EDX,EAX 8 a' a4 H3 H# n0 C# t8 {" k
% S: f( N v3 _+ OInstruction for CPU step 40, v4 k3 c8 m/ A/ r& K
F000:0959 B95002 MOV CX,0250
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, r' J# @6 ~# p' N5 pInstruction for CPU step 41
( q8 r% E% e% Z" b, m) j. zF000:095C 0F30 WRMSR - D" L! o- v& R& u' R* p; O
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Instruction for CPU step 42( \2 c. L* Z/ B5 ?$ j. J- L
F000:095E B95802 MOV CX,0258 . V1 w8 x+ J" ]6 z' z
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Instruction for CPU step 43
6 h# i1 ]/ G+ `% s. U3 sF000:0961 0F30 WRMSR " c& ^1 V8 E( A
" A/ h i0 w% X8 ?# mInstruction for CPU step 44/ ^* I7 a1 l9 K5 ~8 G @+ P, e5 d
F000:0963 B95902 MOV CX,0259
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Instruction for CPU step 450 o% X. B) G3 L% |' n$ j
F000:0966 0F30 WRMSR 0 e6 ~! q" S* W+ p3 p
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Instruction for CPU step 46 ~, _+ Q1 m- i5 U: E' B- L' ]; p
F000:0968 B96802 MOV CX,0268
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& l4 k! S. [. A+ SInstruction for CPU step 47
# d. W4 o2 F; I4 \3 @; NF000:096B 0F30 WRMSR 2 F/ y! O2 y T
: j- ~4 F+ g2 j& k5 GInstruction for CPU step 48
. u2 t! q; x2 A! i* B6 J9 ?$ E1 m# TF000:096D B96902 MOV CX,0269
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1 Z& L. K) t; ^* g& J1 NInstruction for CPU step 49) b, ^( o! [ k8 w/ t8 a
F000:0970 0F30 WRMSR . u( C4 @' W3 U4 K4 m$ U" ~, X
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Instruction for CPU step 50
: A. r; t/ U, m8 dF000:0972 B96A02 MOV CX,026a % V) {) Q8 N3 `) f9 H& w
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Instruction for CPU step 51
: `; ^5 g9 K2 o7 C0 s/ w* A7 VF000:0975 0F30 WRMSR 5 v/ l( Y! U# s+ k, l( f B
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Instruction for CPU step 52
1 Z& y5 b" E8 p+ k* y) K. Q/ {F000:0977 B96B02 MOV CX,026b
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Instruction for CPU step 53
" g% }: E; u0 V+ s) y7 x2 uF000:097A 0F30 WRMSR
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4 D8 H: Q) l& v) WInstruction for CPU step 547 m# F1 f6 q. W9 l$ j+ E- V+ I/ y+ o* X
F000:097C B96C02 MOV CX,026c 3 K7 C9 x; N3 p2 D' W$ r
, `& X# |4 f. ^( m9 N; q* uInstruction for CPU step 55) t& f% J+ G) @+ [' \- e4 Y5 S
F000:097F 0F30 WRMSR
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) v) e& a$ \5 S, HInstruction for CPU step 56/ D7 O, w" Z$ i9 o V9 f) _
F000:0981 B96D02 MOV CX,026d
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- f0 U, f6 {% q* Y6 aInstruction for CPU step 57) q* _! S/ _; G9 m+ Z1 c, `
F000:0984 0F30 WRMSR
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. @6 s" ]* B& t& H- K$ |. m; }. uInstruction for CPU step 58
3 Z5 v4 x+ ^9 i0 u$ k2 [F000:0986 B96E02 MOV CX,026e % d: h# A0 b' Q' K
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Instruction for CPU step 59( I0 U! c0 b v0 }: P. Q2 g( ^
F000:0989 0F30 WRMSR
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. S6 M5 D* \: }7 Y6 x6 o3 r% u) }Instruction for CPU step 604 A# M5 h& E2 V
F000:098B B96F02 MOV CX,026f
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n' e8 n0 u9 [0 a& s: y/ cInstruction for CPU step 61* T4 u3 j3 Z6 `3 M: Y
F000:098E 0F30 WRMSR 1 ?- w% b! k n+ W0 w
2 A2 l. j! a# P* d$ y3 b6 ]# uInstruction for CPU step 62. t3 T4 \9 h: k& M* u, s: z
F000:0990 D1E3 SAL BX,1 - o+ E1 N+ E& k( Z8 ^4 H
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Instruction for CPU step 63* \1 [- c4 T3 A/ F' y8 |5 m7 k
F000:0992 B90002 MOV CX,0200 0 X, c3 I$ x& u& ^1 L* W6 `* {
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Instruction for CPU step 64
* L; M/ o* M3 g0 K6 mF000:0995 4B DEC BX # k4 d8 B' R! P k( d/ }6 b" c) k
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Instruction for CPU step 655 h1 m1 ^! G T
F000:0996 0F30 WRMSR 5 J0 {) `4 u' X8 Y5 l) y# X
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Instruction for CPU step 663 d7 M1 j+ f& g$ H. J$ }# w$ Z) K
F000:0998 41 INC CX ) z" s8 W2 R. Z: t
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Instruction for CPU step 67& }0 H, c/ L% Z
F000:0999 0BDB OR BX,BX % n8 P# q; O/ c$ j) s+ s2 z! r
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Instruction for CPU step 68
6 H6 z* G6 p, s' jF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 69
+ ^% H: q- J/ o; j" o8 ~F000:0995 4B DEC BX % `3 E0 m, i y# A- H4 ^/ q4 G
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Instruction for CPU step 70
% T: _& ^* A* R/ v4 G2 s& yF000:0996 0F30 WRMSR
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Instruction for CPU step 71
" m- W f/ D! yF000:0998 41 INC CX " q! k( [ V6 t" j6 I9 O
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Instruction for CPU step 724 f" l C$ B: U+ U
F000:0999 0BDB OR BX,BX
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: C f) f* D" c! K- NInstruction for CPU step 73
* b5 i0 T9 H) }5 W0 gF000:099B 75F8 JNE short ptr 09956 f. @+ k6 v0 y7 P1 `3 `1 @9 ]- F
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Instruction for CPU step 74; J4 |% g' y+ y. q
F000:0995 4B DEC BX / B6 N& G5 \, d
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Instruction for CPU step 75 [: J+ ~2 R7 w" ]. a6 t
F000:0996 0F30 WRMSR
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Instruction for CPU step 765 v/ ~# p7 A. h4 [8 {
F000:0998 41 INC CX % y8 W8 v& r1 Q/ p G( m7 Z
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Instruction for CPU step 77
/ K7 s' B- l. M0 t7 [F000:0999 0BDB OR BX,BX " y' R+ C# i+ q& @2 X
8 N s, O7 Y0 K- T' }# mInstruction for CPU step 780 U6 D( H( X" Z( {* I
F000:099B 75F8 JNE short ptr 0995
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, `; s7 o! ~/ W1 m! h& s" J3 MInstruction for CPU step 79/ q1 a* W/ s+ p2 u; f3 D
F000:0995 4B DEC BX
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: J. o. I' S3 ^$ v$ p8 ZInstruction for CPU step 80
6 d0 w) K: b$ N4 q) ?7 H; [# L& j. ?8 }) C, lF000:0996 0F30 WRMSR / M5 Y6 ~# |# H& Y
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Instruction for CPU step 812 {5 o6 E b4 n5 _. F
F000:0998 41 INC CX 6 I9 U6 v- z+ u: ?2 [
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Instruction for CPU step 82 M! V1 h: x9 C A) ^
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 83
4 k# ^, w+ i# _9 o& AF000:099B 75F8 JNE short ptr 0995, N# l% X e. i' X# c) @ g3 ]4 ~
6 x$ _5 V( W7 a' PInstruction for CPU step 84
/ ~0 @# l s5 B; Q$ _: iF000:0995 4B DEC BX
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Instruction for CPU step 85
' i. X6 B c7 K, r8 U, p0 ~F000:0996 0F30 WRMSR
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Instruction for CPU step 869 G5 ^& V S* p
F000:0998 41 INC CX
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9 D) L! ~% K' g B/ |7 a2 ZInstruction for CPU step 87+ N' w% x& R& I: W4 @6 c' U
F000:0999 0BDB OR BX,BX 7 c; f3 ]% e& |9 H7 J+ q. D" c; s
8 F6 ~7 P* \5 m$ FInstruction for CPU step 880 `5 @8 f. O1 m/ g$ C& [
F000:099B 75F8 JNE short ptr 0995& x% N: p: M: Z7 v2 x" \
) z9 p. y) E( A) c" F: |2 LInstruction for CPU step 89
/ d/ c7 w ~" dF000:0995 4B DEC BX
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Instruction for CPU step 902 P7 W+ g5 @ V- A6 ?
F000:0996 0F30 WRMSR ; Q' W# A: [; y, i$ X+ b: G
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Instruction for CPU step 918 X& H9 M4 p3 x4 I0 a# z
F000:0998 41 INC CX 7 q8 t& D% Q% B) d
& l, Y( b4 t0 }* s2 iInstruction for CPU step 92" H2 z1 F% M2 J' }
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 93 u6 p) e+ W y. @, j7 Q4 q
F000:099B 75F8 JNE short ptr 0995
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7 o6 u0 j1 C* {; tInstruction for CPU step 94
) Q( Q6 Z9 S" ?/ U" q3 qF000:0995 4B DEC BX
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Instruction for CPU step 95
2 ?% y4 |2 D; E/ e; W& \F000:0996 0F30 WRMSR
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Instruction for CPU step 96$ G. n: P3 K' @. i9 R/ n- ~1 d
F000:0998 41 INC CX
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Instruction for CPU step 97
6 o5 Z( L, r4 J5 _' gF000:0999 0BDB OR BX,BX ; ^! l; i7 Y, e# [( I
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Instruction for CPU step 98! {6 E8 \% p5 u$ h9 g4 a
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 99
2 j! \+ ~9 [+ w5 y" K- fF000:0995 4B DEC BX
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3 }6 d6 S& D. d6 Z1 ?" F; G- j5 tInstruction for CPU step 100
4 Y: z1 ]) v2 Y& IF000:0996 0F30 WRMSR
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Instruction for CPU step 101# p9 u5 q8 b0 }% z! x W. B+ {
F000:0998 41 INC CX
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5 i$ y0 C- H0 J; cInstruction for CPU step 102
3 B" V. e4 Z# ^ d1 yF000:0999 0BDB OR BX,BX 5 K# V2 `! _9 o( ?
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Instruction for CPU step 103
& s" k. ]5 s0 iF000:099B 75F8 JNE short ptr 0995
4 O$ h5 \3 |" k1 T/ L - B' S5 N5 X, F9 ^, W- T/ q( a+ `
Instruction for CPU step 104( i6 x; @4 B9 I# W) G
F000:0995 4B DEC BX |
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IP卡
狗仔卡
发表于 2009-5-24 16:39:29
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