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CPU Reset 后的前100多条指令6 }+ g" r6 ~3 r: D: z C+ E
测试平台: Intel Menlow Crown Bench CRB
. f! g% c) ?6 i0 Q- ?0 `+ WBIOS: 自带的 AMI BIOS
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Below is the instruction and registers when CPU reset
B8 a, I7 Z7 }" DF000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa
% q' h; L9 Y) d& t4 rEAX = 00000000: AX=0000 AH=00 AL=00
8 y# U+ v( B% o3 ]" s4 \/ w2 LEBX = 00000000: BX=0000 BH=00 BL=00
# j- ^$ R- n8 i9 Z7 OECX = 00000000: CX=0000 CH=00 CL=00
. P; p2 ?, E; V- |) G3 j; H& k6 r, i ^- dEDX = 000106C0: DX=06C0 DH=06 DL=C0 ) F T" w/ Q7 L5 D9 z& P- Q6 g- S: F& J
EBP = 00000000: BP=0000 " O. S9 p% U, g1 b! K
ESI = 00000000: SI=0000 . i) W! Z+ R p7 Q8 u! |
EDI = 00000000: DI=0000 . ^# m7 {$ O. r2 z# u
ESP = 00000000: SP=0000 : E' P' z0 ?- A. j# k
CS = F0004 a; G# z/ x0 E! s) Z. l( g
DS = 0000
8 V: _0 {: C2 }! L: V, [SS = 0000
( G/ T. ?' o7 E* i3 e6 eES = 0000
2 \8 ]" {; p$ g0 P7 e& j2 g j9 AFS = 0000
[$ Z' R3 C0 o! t- d! D% KGS = 0000: m' c% F5 A; x6 O4 T$ J
EIP = 0000FFF0: IP=FFF0
: j, B5 r% _6 D% QEFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
$ A# ~. H: \# t& O: z. oCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0 5 n, C% l; e1 l& A
CR2 = 00000000
& Q3 F; A6 q) A2 x" P+ mCR3 = 00000000: PCD=0 PWT=0 ) }: q/ w5 x5 ]. @/ x2 {" s
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 : N* Z& Z) H1 \# M
$ u" R |7 d3 @7 ^7 sInstruction for CPU step 00
! @ a* k6 l( }/ I0 eF000:FFAA E9C300 JMP near16 ptr 0070& w4 p" ^7 s3 l- u
4 ~, o% u5 N( Y, KInstruction for CPU step 01) K8 z: \ y( G$ b
F000:0070 E9FD01 JMP near16 ptr 0270& N* t0 S( I; z1 F, _: c
( ^* d {5 p' Y7 KInstruction for CPU step 02
) G/ N5 T2 m% @6 V9 j8 LF000:0270 FA CLI `; I( W" K6 e) q8 y" q# X
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Instruction for CPU step 03# h# v- [( n( ]% d1 _3 L5 e
F000:0271 FC CLD
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Instruction for CPU step 04
U# K" E( ]4 b( H8 O2 l5 H4 Q TF000:0272 668BE0 MOV ESP,EAX / g7 T( u* Y2 b
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Instruction for CPU step 05
+ p% U! v) q5 t8 I2 eF000:0275 8CC8 MOV AX,CS & T: `: \2 F! Q6 h* ^
: F# f; ^/ ~/ j9 Y, Z+ iInstruction for CPU step 06
- p! a# ?- G3 P4 fF000:0277 8ED0 MOV SS,AX 4 z$ m: R" M5 W' F! n
+ i4 A! b: ? lInstruction for CPU step 076 Q- S( o3 b8 w
F000:027C E957FE JMP near16 ptr 00d6
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7 [& f' v/ a7 GInstruction for CPU step 08
9 |& H) A4 g. v( }. J. v; S) X4 IF000:00D6 E9A601 JMP near16 ptr 027f' A! i' t N3 \+ y0 k- s& E
& E3 x# w7 ?# t m" k7 |! MInstruction for CPU step 09/ z$ y$ ?7 @! m+ b7 q
F000:027F B0D0 MOV AL,d0 4 I+ ~8 [, h, [% {* F5 l
% ?" J9 P j, B6 b' d" `Instruction for CPU step 10: [: ]9 }+ ]2 E+ |! _: B3 X8 \+ n
F000:0281 E680 OUT 80,AL # ]- y4 i, T0 ^$ E, t! L
6 W$ w* \3 X% B9 z& M" t( TInstruction for CPU step 11
2 ]! @ z) o4 nF000:0283 BF8902 MOV DI,0289 : k& X2 a5 i% o& n% _
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Instruction for CPU step 12
- {- `; ~+ i$ z7 J+ bF000:0286 E9AE06 JMP near16 ptr 09372 T7 |6 j0 ? C- y+ }
& a* { g4 h3 F5 `* } TInstruction for CPU step 13
5 U ]. F9 r: W1 F. `9 X' Q8 zF000:0937 0F08 INVD
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Instruction for CPU step 14
/ W$ d k; C" o3 i& }: eF000:0939 0F6EFF MOVD MM7,EDI
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, f8 p0 s- z9 ? @Instruction for CPU step 15
) p" R# c/ y% M! L* Q# bF000:093C 668BC4 MOV EAX,ESP
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Instruction for CPU step 16! K6 w. }' d4 h' t9 w6 ]
F000:093F E97C08 JMP near16 ptr 11be, f8 \5 I7 T1 I, W; R% T$ A( B( a
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Instruction for CPU step 170 X% G* _! x& o9 t* I- U% o
F000:11BE E981F7 JMP near16 ptr 0942
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. ]! H; R2 {- i& L) XInstruction for CPU step 18$ Z( i8 Z5 Y0 h8 l: Y0 j
F000:0942 BF4809 MOV DI,0948
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- B0 R3 W+ C5 ]8 i1 n% BInstruction for CPU step 19
4 s4 b- F4 k' K# u$ y: [F000:0945 E9C004 JMP near16 ptr 0e086 l( o0 C* b5 C' M$ k: Z1 w' m: W
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Instruction for CPU step 20
* _# s8 E/ k7 l: y+ _, LF000:0E08 0F20C0 MOV EAX,CR0
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Instruction for CPU step 21
4 l9 f0 z A0 ^1 a8 gF000:0E0B 660D00000060 OR EAX,60000000
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Instruction for CPU step 22
' d! M a4 H: D9 S9 L+ @- l8 H: S3 jF000:0E11 0F22C0 MOV CR0,EAX ; T7 X% L, b! h: S9 w/ D
8 w0 \; d8 O, |& w! Z; j8 t% T) ZInstruction for CPU step 23 @$ M1 h) w$ X9 L9 n
F000:0E14 0F09 WBINVD 1 H5 O$ ~6 L: H/ M1 h% `# E9 b1 x
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Instruction for CPU step 24
8 C# j/ l8 l1 f P6 k: fF000:0E16 66B9FF020000 MOV ECX,000002ff
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- r* b2 o9 ] h* I& l; pInstruction for CPU step 25
8 q) M5 F7 g/ s0 ~: @! d. WF000:0E1C 0F32 RDMSR
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5 I% j; n( d' ~$ x4 m* V. rInstruction for CPU step 26
* \: \0 z( Z! k8 ?F000:0E1E 25FFF3 AND AX,f3ff ) z5 C0 {* R+ e) I+ @3 a% c, r
d, k/ M; h+ A8 N# Z8 W* Z
Instruction for CPU step 27# ^' o# {6 ]1 `6 E
F000:0E21 0F30 WRMSR - Z* n; W/ V5 H+ A" O
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Instruction for CPU step 28
; R% d0 x" Y$ j. m; `: |+ LF000:0E23 0F09 WBINVD
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1 E7 v( x2 W0 V+ j7 EInstruction for CPU step 298 \+ l3 i; s+ n [
F000:0E25 0F20E0 MOV EAX,CR4 ( n" L- h3 M, h
! |( [$ \" s5 I7 v5 }Instruction for CPU step 30
& A) O8 g! g C( O5 x6 YF000:0E28 247F AND AL,7f
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+ ]* G6 N$ u7 I# }- KInstruction for CPU step 31
0 C" D- ?0 A& vF000:0E2A 0F22E0 MOV CR4,EAX 5 x5 ]$ J8 Y1 j
, ?; m) D( |8 \% W# ^7 iInstruction for CPU step 32& h- F1 e- A" B: [& B( Y1 T
F000:0E2D 0F20D8 MOV EAX,CR3 ! F7 }0 D( P9 `* g) a+ m" [4 ]
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Instruction for CPU step 33
$ p; Z; h$ x" p& F6 r) _F000:0E30 0F22D8 MOV CR3,EAX
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' y- S' i! W& x3 ^6 K; N7 mInstruction for CPU step 34# x# W: c" t3 j( k2 [
F000:0E33 FFE7 JMP DI 4 q7 @. \1 [" C
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Instruction for CPU step 35
. u5 k7 I* L! ?" J yF000:0948 66B9FE000000 MOV ECX,000000fe& q! W& R# R5 O% S5 k
L/ C* u: x3 u; _Instruction for CPU step 36
% _5 U/ r; A: o+ n' k" vF000:094E 0F32 RDMSR
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Instruction for CPU step 37) `# j \& z2 E7 W+ `
F000:0950 0FB6D8 MOVZX BX,AL
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" V+ p$ i. h2 |; t! H( u7 @Instruction for CPU step 38& p6 s1 g9 G+ B! Y0 L& ~
F000:0953 6633C0 XOR EAX,EAX " s7 ?2 V- D- j4 @: K4 Z. A, @
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Instruction for CPU step 39
+ Q" k5 C! I+ P' uF000:0956 668BD0 MOV EDX,EAX
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/ b, r5 X# m1 F* B) PInstruction for CPU step 40" r9 a0 ?3 F- Q; w% ^
F000:0959 B95002 MOV CX,0250 7 |2 M# ^' M& x0 ]0 T9 J8 E
8 J% O$ [7 M1 I2 O; K" ZInstruction for CPU step 415 F- x8 X! m8 I4 O' A) R. H4 Y
F000:095C 0F30 WRMSR / J. E }$ Q- }4 I% @5 P
0 ~8 W# g' u2 b3 S8 c: e6 PInstruction for CPU step 42$ `( }9 a4 T F' @/ Q1 b
F000:095E B95802 MOV CX,0258
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0 H$ @; T& j, P8 U2 b6 QInstruction for CPU step 432 L' b' _6 _8 O
F000:0961 0F30 WRMSR
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6 M( l+ S5 g8 f6 Q `Instruction for CPU step 44' v; E2 q9 e/ X4 W2 k O+ p
F000:0963 B95902 MOV CX,0259
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1 ?- y B! S+ i2 aInstruction for CPU step 45
4 J' r* e$ }+ T4 D2 K) [F000:0966 0F30 WRMSR + I" d1 S9 |% l* Y0 E
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Instruction for CPU step 46# j6 H2 v9 q% B) n* Z8 E4 ~0 @
F000:0968 B96802 MOV CX,0268
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Instruction for CPU step 47
$ s |9 I- B2 P& n: e* qF000:096B 0F30 WRMSR % k" m/ }: P# n B w$ {
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Instruction for CPU step 48% p1 o$ Z1 L% C% @, Q# }
F000:096D B96902 MOV CX,0269 * K0 P: _1 Z5 o% O# `' a
. `) u0 |2 ^ C+ l- J p+ s3 yInstruction for CPU step 49: T8 D# H; s9 ~ V" V# T% m+ c
F000:0970 0F30 WRMSR
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y# O1 w" t7 L# T6 |! CInstruction for CPU step 50
( n( Q. a, R$ g. ^8 \$ R/ AF000:0972 B96A02 MOV CX,026a
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Instruction for CPU step 518 H& v$ h$ m# B t
F000:0975 0F30 WRMSR
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2 Y$ A: w8 w# O! a+ o: s+ MInstruction for CPU step 525 @+ y- J3 i8 N) V
F000:0977 B96B02 MOV CX,026b 1 U. \5 r% f1 y2 Z
/ `3 |7 ]9 U# t* e8 l w& qInstruction for CPU step 53
2 i" Y# m% q4 y5 nF000:097A 0F30 WRMSR
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: I- |* {/ d0 v6 M0 G1 u$ vInstruction for CPU step 54
; `9 c+ o5 |6 h5 C q. T5 cF000:097C B96C02 MOV CX,026c ; u4 m8 A8 q f0 o9 i! W
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Instruction for CPU step 55. J7 p9 e' G4 q( j% S
F000:097F 0F30 WRMSR $ h1 j4 M0 v3 d+ H7 _) Y! Z
0 `# Z3 s* i; N* d& L
Instruction for CPU step 56
$ ^- _9 X n8 P7 r3 n% XF000:0981 B96D02 MOV CX,026d ) B; c+ _, y+ ^0 z& S* u
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Instruction for CPU step 57
1 {- ~" \( R. U* h. H+ WF000:0984 0F30 WRMSR 2 w9 F: j. j& x3 p1 O1 }
0 C6 Y2 d l* ~1 ]Instruction for CPU step 58+ D2 z2 `$ b! `- \6 b
F000:0986 B96E02 MOV CX,026e ( G, m1 L- | d0 X( r8 A/ N
3 U8 d' B5 Q/ n3 x6 E: [Instruction for CPU step 59
3 b6 a1 G$ H5 `8 G8 xF000:0989 0F30 WRMSR
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5 F& o" `9 C2 x7 j% CInstruction for CPU step 60
: p# a1 U# T# dF000:098B B96F02 MOV CX,026f $ z: |( x" B+ ]! ?1 q
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Instruction for CPU step 61
, o6 S9 V! ~$ oF000:098E 0F30 WRMSR
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. U6 p; Q, Q# j: e( `Instruction for CPU step 62
* T1 i0 n v/ A! IF000:0990 D1E3 SAL BX,1 " A& V! H7 c0 ]" ?) v0 C: e+ w
; H+ K6 H# `& d WInstruction for CPU step 63
4 q4 s# A6 ^1 W2 xF000:0992 B90002 MOV CX,0200
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Instruction for CPU step 64
4 z& i. g4 j' r3 bF000:0995 4B DEC BX
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Instruction for CPU step 65
~4 E; F n8 E9 hF000:0996 0F30 WRMSR . \0 D1 H& S/ i7 O( X
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Instruction for CPU step 66- B* d6 l2 o$ B) U$ s6 Q
F000:0998 41 INC CX
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Instruction for CPU step 674 M0 R. q. \4 _5 ^4 Z' i: w
F000:0999 0BDB OR BX,BX " [3 `+ M! |3 H4 c9 I; ]
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Instruction for CPU step 68
- n2 I( X: k2 `0 `1 o; nF000:099B 75F8 JNE short ptr 09952 q* ]2 Q, H2 C2 o- d2 q4 H
2 w: y: w$ P5 E" S0 L
Instruction for CPU step 69) l( }8 @- X( P/ U: k
F000:0995 4B DEC BX 1 ?6 _+ i4 \$ l# Q# H& I O
2 |$ V S. t! w1 L; t$ EInstruction for CPU step 70
' M8 W8 }% V6 V* z5 e" Q! @5 X8 qF000:0996 0F30 WRMSR * g( n; y: f! A" N3 a6 L x
) T/ r$ i. ^- kInstruction for CPU step 711 o5 ^: \! }' I- P. k6 t* w
F000:0998 41 INC CX + A" Y1 `% D" X ~
6 S6 E% h2 w' | Y; D j4 O' mInstruction for CPU step 720 i2 t& L% e! B/ r8 v
F000:0999 0BDB OR BX,BX
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Instruction for CPU step 73' M* }: ~& Y, n% B' f' I( N% p
F000:099B 75F8 JNE short ptr 0995+ @; {3 a" ]# C+ ], g2 A) R* ]5 Z6 ~
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Instruction for CPU step 74
7 A5 G4 [* I- i& b# a. [4 R) bF000:0995 4B DEC BX
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Instruction for CPU step 75
, q4 |* P2 E! k7 V( jF000:0996 0F30 WRMSR 4 ], o1 A+ S9 h, @" ?! |3 y
) Y& O) g& u7 x9 q* |% \Instruction for CPU step 76
' \& n# K/ C7 x) P8 KF000:0998 41 INC CX l/ E$ ^" Q) |5 @$ a, g
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Instruction for CPU step 771 I" f2 y1 ?( F$ n5 N {2 j
F000:0999 0BDB OR BX,BX 9 r, f/ o9 ]/ m8 R# A$ D* o
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Instruction for CPU step 78$ ^" P. s' K5 z7 H) U2 {+ I r+ o
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 79
+ e( l2 N+ T, ^9 Z+ h$ y: `F000:0995 4B DEC BX
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Instruction for CPU step 80* i( F4 p; n$ Z2 w
F000:0996 0F30 WRMSR
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Instruction for CPU step 81$ B3 o+ H/ o- y' k# S
F000:0998 41 INC CX ) W' Z) V/ y$ L$ _1 _; j2 W
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Instruction for CPU step 828 C0 g% h3 ]8 C/ h
F000:0999 0BDB OR BX,BX
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- g) o# y0 ]& nInstruction for CPU step 83
' I" [8 Z) d c+ t6 [F000:099B 75F8 JNE short ptr 0995" v+ l/ {8 u4 z
1 V; n2 ]" v" w, ]Instruction for CPU step 84, ~ u, [4 U; @, m0 Y) h
F000:0995 4B DEC BX $ f( n/ g, i; Z9 p6 ^9 R
' T1 N( B/ O- q7 P% R WInstruction for CPU step 85
4 M+ d5 X+ A F& \4 @' F) HF000:0996 0F30 WRMSR 6 b$ v2 y4 S9 w- j5 f
- T+ l- y' p8 [8 n! V# v/ EInstruction for CPU step 86
4 q P8 a4 p* Y; q4 g" u( M& W9 }F000:0998 41 INC CX " y" \5 F# J1 Q5 ~- F
+ C! H! ~7 ]" k p6 _/ t+ L) w) [! RInstruction for CPU step 87
* G* k5 ]# ^& H* kF000:0999 0BDB OR BX,BX
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1 }1 ?& [. N; ZInstruction for CPU step 88
]& k! l% B$ K9 Y0 p LF000:099B 75F8 JNE short ptr 0995' [3 o( _9 v0 y8 w5 K+ p
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Instruction for CPU step 893 X2 f2 j2 U3 ]% d# S" Y$ b- r$ V
F000:0995 4B DEC BX % k e& K3 q4 d
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Instruction for CPU step 90
( c$ p i+ I1 ?. I. hF000:0996 0F30 WRMSR
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1 N! Q- k; B8 u2 `; q* j' MInstruction for CPU step 91! I; A& N/ |; x# R& r
F000:0998 41 INC CX . S! [& p" b1 ?5 @5 [) R
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Instruction for CPU step 92
& S$ J( g* v8 [F000:0999 0BDB OR BX,BX
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7 G. M$ B1 e+ q7 \Instruction for CPU step 93
7 w; \. ?& R/ o. ZF000:099B 75F8 JNE short ptr 09954 }! o3 X$ l0 j& o& m8 M( j- l
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Instruction for CPU step 94. r* t7 s6 ~( m5 G q5 [# y# \% |
F000:0995 4B DEC BX , M0 S0 W* l, ^% u3 j6 B5 Z0 S
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Instruction for CPU step 95
0 T( R+ w- s' EF000:0996 0F30 WRMSR
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Instruction for CPU step 966 G5 ?' {+ v5 v' E
F000:0998 41 INC CX 7 \% X) O6 B& ~" D1 `; i5 n
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Instruction for CPU step 97; F5 u) E5 ~9 Q& l* B7 d
F000:0999 0BDB OR BX,BX
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3 ?% F# d v: k' DInstruction for CPU step 98
1 z4 H) a. X. w8 O/ i; n6 J3 ?F000:099B 75F8 JNE short ptr 0995 a' W4 ]! o! G7 n2 ~3 H6 I
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Instruction for CPU step 99
+ ]. k3 A) b6 }* r3 _: BF000:0995 4B DEC BX
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Instruction for CPU step 100
7 S( k5 O, U# DF000:0996 0F30 WRMSR
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Instruction for CPU step 101
8 T7 b* h' t2 CF000:0998 41 INC CX
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Instruction for CPU step 102
: n$ E4 C( Q. U G' E1 FF000:0999 0BDB OR BX,BX + v6 p9 K; Z! F; `
) E' m p2 m# Y& xInstruction for CPU step 103' H; s j: S0 M s8 `2 P
F000:099B 75F8 JNE short ptr 0995& K6 O& Q4 F. p+ Q& ?$ K! Z
1 K, K) R2 O( X
Instruction for CPU step 1041 ?3 j( i+ S6 x7 }5 Y5 D' G& j
F000:0995 4B DEC BX |
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