Programming Interface for Bus Master IDE Controller Revision 1.0

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Programming Interface for Bus Master IDE Controller Revision 1.0
& L; H; y; z' \9 Z1994/05/16
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/ g: m8 A; a! J* M. [! k8 [This document defines a register level programming interface for a bus master ATA compatible (IDE) disk
controller that directly moves data between IDE devices and main memory. By performing the IDE data
) w% C% W. a$ z1 Atransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
and improves system performance in multitasking environments.
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8 m1 C; x0 A; i7 u) V& ]4 [Until this specification is ratified, it is solely
. h9 U5 v+ Z  e5 r9 V" M6 sowned and maintained by:
Brad Hosler, Intel Corporation
bwh@salem.intel.com (please comment using email)
( V$ K6 L# M4 K/ d+ p4 F503-696-8431