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Feature Summary* r, q* H- q; q. ~5 T/ U6 \
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Low Pin Count Host Interface (LPC)) {( @5 c! u- F4 q O" W3 @
SIRQ supporting IRQ1, IRQ12, SCI
, Z `8 D% r) L" ?) v, J I/O Address Decoding:" e3 V3 r9 V% \# _/ {- n' ?
KBC IO Port 60h/64h
8 B: ~" @$ F* v9 @' R Programmable EC IO Port 62h/66h and 68h/6Ch+ X$ b' u2 `; o! f% G- B
Programmable 4-byte Index I/O ports to access internal registers7 s2 l( A& ]; J6 }+ Z6 F+ {
One Programmable I/O write byte-address decoding" B7 @, D3 h. X1 `
1 {6 `5 Q6 Q! a8 h! q) K' m' y3 u4 Z
X-Bus Interface (XBI)
" E6 ^: r4 c: Y$ Z0 ?5 L% p" K SPI Flash support, the operation frequency runs at least 50MHz.
( c& g! k* E! Z6 ?1 Z! f5 { Addressable Memory range up to 24MB.
' i" n, b. ^5 y& L$ b 8051 64KB code memory can be mapped into 4 independent 16KB pages.
) y9 r$ a0 G, ]! h
+ K- s- ?( ~3 l$ O# x8051 Microprocessor- Y) {; o% L/ K. h/ j1 a- x
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
, Z+ l$ b& w, H1 O7 L/ Z7 m/ H Programmable 8/16/32 MHz clock
) j1 o' y2 U4 }' h: [" k1 b Fast instruction fetching from XBI Interface0 L& [. O7 l5 V: s# C! P. r
128 bytes and 2KB tightly-coupled SRAM
+ h+ V1 I0 \1 C# p" G 24 extended interrupt sources.8 u# H3 t; a I. E& y$ E
Two 16-bit tightly-coupled timer
' A: X- A( P+ D1 j* Q- n2 d% l7 b: n! f' W: V& \1 r/ }: m
8042 Keyboard Controller# |0 c+ i: k% b) E/ S
8 Standard keyboard commands processed by hardware9 s7 F( x9 i# p" N
Each hardware command can be optionally processed by firmware/ I& G& p g2 A( L) I
/ h, E( g1 P- y4 m5 _Embedded Controller (EC)8 Y5 a, Q [; i9 j6 d
Five EC Standard Commands can be processed by hardware
9 A/ |5 K; v" y* y E4 v z ACPI Specification 2.0 compliant
j, I5 S+ i9 D" F" n Support customer command by firmware
/ k+ T6 q, K- q% {0 U6 f2 p Programmable EC I/O port addressing (default 62h/66h)
& P k/ y: C+ ]+ l; H. G% g; H. ~; F
Analog To Digital Converter (ADC)
/ N- l9 y) s8 e9 r2 G 6 built-in ADCs with 8-bit resolution.* {7 I$ e6 G5 u; V2 O% `7 `% g
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).$ \* Q0 y. M3 E, p- t7 q4 f
! k. r; m2 a* [1 yPulse Width Modulator (PWM)5 l L# K3 g! T6 {
5 built-in PWMs# u* T3 K; T' e5 B
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.3 a8 V( h3 t5 ]$ _
Configurable cycle time (up to 1 sec) and duty cycle./ E/ P8 H" u( L, p: c2 z
1 d( d6 E A/ K+ ]Watchdog Timer (WDT)/ X3 r# w( B' l1 E" f2 B6 K8 |! l
32.768KHz input clock with 20-bit time scale.
$ F* L$ L# v/ V- C- E8 t 8-bit watchdog timer interrupt and reset setting3 I* o% k9 \, W& u/ r
6 o3 C M6 Z/ K% M
General Purpose Timer (GPT)
7 k/ y; e* ~! y, ~* N4 P Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
9 K# |; R; P7 W
2 s* l. e! T+ _$ HGeneral Purpose Wake-Up (GPWU)
5 {. N; \, v, H" B5 V5 g All General Purpose Input pins can be configured to generate interrupts or wake-up event.
- a, ~1 ~3 o6 i8 n
) @) E; n4 ~( ]& P* j: nGeneral Purpose Input/Output (GPIO)
* W/ O" S( L, F3 Q7 `; J8 \ All I/O pins are bi-direction and configurable
7 [- f5 K8 P# N1 v/ n All outputs can be optionally tri-stated% B2 p' p- ?. W& l
All inputs equipped with pull-up, high/low active, edge/level trigger selection
2 { c; R4 G, x All GPIO pins are bi-direction, input and output.5 f+ o; s, u M, l5 F* [) V3 f
Max. 43 GPIOs
2 X3 U) f2 G v7 b9 {# Z2 K
" e" k& {. [- W0 O' X+ x/ w9 xPower Management
0 D0 r* I4 a, R+ z Sleep State: 8051 Program Counter (PC) stopped# X7 h* y. X. F( e; s' U
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.& H4 F/ @. E+ I1 a2 Q7 ]# ~
; H3 i+ h7 F" u6 v$ `Total Pages: 40 |
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