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Feature Summary6 D6 e8 j3 ~, @8 z5 v2 Y
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Low Pin Count Host Interface (LPC)' y1 ^0 |/ j* c! ?
SIRQ supporting IRQ1, IRQ12, SCI9 s! v7 S7 v0 o S! a
I/O Address Decoding:
- B+ H/ p- t% d' _. X KBC IO Port 60h/64h
. O# W L. P; t, @7 b+ O: b$ _ Programmable EC IO Port 62h/66h and 68h/6Ch1 V; f+ X0 F1 I" ~
Programmable 4-byte Index I/O ports to access internal registers+ k* M7 e1 E3 j' `# I
One Programmable I/O write byte-address decoding
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. z+ P; S7 P8 m5 [6 Q* NX-Bus Interface (XBI)
3 V Z/ e8 O$ B" n5 p SPI Flash support, the operation frequency runs at least 50MHz.
$ s- e% w7 ~; y& }9 q0 ? Addressable Memory range up to 24MB.
8 \. l% l: Z% r- c9 n 8051 64KB code memory can be mapped into 4 independent 16KB pages.
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8051 Microprocessor/ c4 r) q2 R2 C' J% j
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
) x& v0 h5 I1 z& J) I" F( L Programmable 8/16/32 MHz clock
1 ~7 b/ r9 U0 e; C2 b* a8 U& p$ s# \ Fast instruction fetching from XBI Interface
6 ?# {& F5 f" Q1 b! k3 G- o- b9 y1 K# { 128 bytes and 2KB tightly-coupled SRAM& ], M8 Z6 w5 E0 c0 [- S
24 extended interrupt sources.
: S7 R( G/ n2 X" G Two 16-bit tightly-coupled timer
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m, C% L7 K: v! E* S, k8042 Keyboard Controller
8 h, W* O) j) o1 A4 m& I; p 8 Standard keyboard commands processed by hardware- {# t! w& I6 T3 w3 G
Each hardware command can be optionally processed by firmware
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% E7 _9 }% r+ V# g% dEmbedded Controller (EC)2 d! |0 c% V1 @! [
Five EC Standard Commands can be processed by hardware
0 x: o9 |, T* z+ \. w ACPI Specification 2.0 compliant- P# F- G" W+ r% Y' t& l
Support customer command by firmware
" ~: R, C0 D+ `5 | N Programmable EC I/O port addressing (default 62h/66h)
2 h }8 A- A9 D
$ {, c I6 g) ?3 c1 S1 HAnalog To Digital Converter (ADC)
6 j4 t7 A! j, i/ b 6 built-in ADCs with 8-bit resolution.1 W% v* M/ }& K1 @+ }' S
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
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. _9 X. c4 q" d% q1 wPulse Width Modulator (PWM), y6 w5 H. p! @$ {# L! N
5 built-in PWMs( ?: C8 i! c! G2 q
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.$ V# @2 h" J' l/ |# I- c6 E4 m2 x4 ?
Configurable cycle time (up to 1 sec) and duty cycle.1 G R( b4 J, E ~! [6 b
. u* k; p/ s$ y [) L; gWatchdog Timer (WDT)# r m- |1 ^' U. ?5 I" h
32.768KHz input clock with 20-bit time scale.* E- ~% U9 x' w% W1 K) y
8-bit watchdog timer interrupt and reset setting
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General Purpose Timer (GPT)
( R B* _& |1 f ~) f4 R7 q Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution; x" C7 e3 v+ M; i' J5 m
3 |7 |# s8 T* j" ?; v3 O; d
General Purpose Wake-Up (GPWU)
& V1 A* k- K0 B& G1 S$ w% u All General Purpose Input pins can be configured to generate interrupts or wake-up event.
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General Purpose Input/Output (GPIO)
! \8 j# B1 q# d& r- z& j All I/O pins are bi-direction and configurable' d1 w2 f* [& D/ ]1 l0 w9 n- i, y8 V" A
All outputs can be optionally tri-stated* C J2 w3 {: R* Q" U
All inputs equipped with pull-up, high/low active, edge/level trigger selection0 X8 A4 i$ ]- z5 a8 e" @, @# E
All GPIO pins are bi-direction, input and output.4 o3 o7 e. q. ~6 [ R% w
Max. 43 GPIOs/ Q. Y) |7 M% ]- n* h, g
: S5 P% u) E+ L& ~$ bPower Management
7 T$ @) O2 z7 x# D/ f& T Sleep State: 8051 Program Counter (PC) stopped _# W- ~0 `0 \
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
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) f' J" d$ J* I9 s& E6 KTotal Pages: 40 |
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