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Feature Summary
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Low Pin Count Host Interface (LPC)
3 P% o' B6 v7 x7 C$ c) M D$ w SIRQ supporting IRQ1, IRQ12, SCI% T- G" ]$ A# E3 F
I/O Address Decoding:1 k7 m J2 f5 Z' L
KBC IO Port 60h/64h2 g5 D: n$ ^8 T9 n3 t
Programmable EC IO Port 62h/66h and 68h/6Ch8 U3 U1 @3 T- p# L1 a2 E6 S
Programmable 4-byte Index I/O ports to access internal registers" T$ \: j6 r2 J7 @" E
One Programmable I/O write byte-address decoding
" T4 O% f4 c# c/ ^# `) d
3 |/ M6 X2 x& S; O; l \1 VX-Bus Interface (XBI)/ ^0 x8 _2 p' Y& C$ N! R! A- a
SPI Flash support, the operation frequency runs at least 50MHz.
- `- z9 o3 ~7 B3 _9 X: g8 z Addressable Memory range up to 24MB.
' v! U7 [6 ~7 ]# j 8051 64KB code memory can be mapped into 4 independent 16KB pages./ a) o/ H" ~4 S* F2 L6 r
; i4 ~: d6 J8 {7 F s% p
8051 Microprocessor
# @! L/ a' w% I, Y Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
0 N3 C$ d' W8 ` j Programmable 8/16/32 MHz clock/ u; V0 `4 P' B' L
Fast instruction fetching from XBI Interface* n6 q8 P3 @" Z
128 bytes and 2KB tightly-coupled SRAM! @, ]( S& p, q# W d3 O
24 extended interrupt sources.0 _9 W, y! T8 q- z; [& H$ F
Two 16-bit tightly-coupled timer
7 q6 T! Q3 @, Z/ Q& \ y& d4 |% u
f6 X) U) S! `! c0 R R9 v5 r8042 Keyboard Controller5 ]3 Z& q$ ^( v, D' G
8 Standard keyboard commands processed by hardware$ T/ a& }" X9 q
Each hardware command can be optionally processed by firmware6 k3 F& E8 e3 q/ D1 X5 E1 K
) J0 e2 m4 f: a9 uEmbedded Controller (EC)! r( C D6 D! B2 u. G
Five EC Standard Commands can be processed by hardware8 e: c2 l+ z% {4 K/ a
ACPI Specification 2.0 compliant
& w$ @% ]1 M1 C% ^3 s! g& u) @- V Support customer command by firmware7 d6 @6 D6 I; w
Programmable EC I/O port addressing (default 62h/66h)
) k6 a; d: p) y: @
) ^" x6 b! N: v m: f0 sAnalog To Digital Converter (ADC)- Q3 a0 Z |/ |( Q
6 built-in ADCs with 8-bit resolution.
) ~+ o: F L4 |. q The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
% _3 k0 m3 Z5 U5 B* o- c0 j' W% u: {6 ~ S, z
Pulse Width Modulator (PWM)6 {/ z( @$ U0 |! K r
5 built-in PWMs+ n/ Q0 k( P" i$ r
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.& K; W( I1 _. F/ ], \$ [
Configurable cycle time (up to 1 sec) and duty cycle.& L- G8 E" s- `/ |! B- E7 b! x
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Watchdog Timer (WDT)
+ |* L5 } t- a' `. M9 i( b1 w- r5 `1 n 32.768KHz input clock with 20-bit time scale.. W- I6 D" T6 i5 ^8 z0 ~* a
8-bit watchdog timer interrupt and reset setting
! |6 \0 \$ w. n* p) c0 }4 G6 ?& Y/ ^3 u9 q
General Purpose Timer (GPT)0 [; L4 P; i; R9 Q6 t; m
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
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) B' K5 J4 L2 G- H o1 s" Y3 v6 kGeneral Purpose Wake-Up (GPWU)
4 O4 h: u, Z" e; F. ?8 s4 R. G0 M All General Purpose Input pins can be configured to generate interrupts or wake-up event.4 x6 X2 D: h# k
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General Purpose Input/Output (GPIO)
% h5 C) ^1 F- b' e* l0 v. `) A All I/O pins are bi-direction and configurable
7 B4 E' R1 s! p& ~ All outputs can be optionally tri-stated
' S H4 v- G2 n+ J4 {( ?$ \ All inputs equipped with pull-up, high/low active, edge/level trigger selection
8 f8 h7 b8 a U- V5 t All GPIO pins are bi-direction, input and output.; y% _4 D% ~+ T$ d) L
Max. 43 GPIOs
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Power Management# ` d/ x. l, B
Sleep State: 8051 Program Counter (PC) stopped
# g O5 U [! E) x( y+ C2 G Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA. Y) A& U# z' |/ r1 e5 U" h& l
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