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ENE KB3700 Keyboard Controller Datasheet R0.1 2006

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发表于 2007-12-21 18:08:39 | 显示全部楼层 |阅读模式
Feature Summary. V' f3 i7 A* t1 |* F  k/ n
6 X8 j/ ^6 f6 P8 @
Low Pin Count Host Interface (LPC)
. p8 X$ ]2 k% ~% V* _  SIRQ supporting IRQ1, IRQ12, SCI
. S$ T  G% ], M9 J+ |# L  I/O Address Decoding:
. v7 D1 f" S, {( b5 K* g" e  KBC IO Port 60h/64h
, Z- L$ N" V  X% O7 @" k  Programmable EC IO Port 62h/66h and 68h/6Ch: o5 s0 f& s0 }6 c+ u! L
  Programmable 4-byte Index I/O ports to access internal registers
, Z6 k' U4 i' Y4 `9 k- Y3 q  One Programmable I/O write byte-address decoding3 ~- R9 k) V. ~: w2 ~) s/ A5 f
' w- h5 E: e- U+ @  V( N; z3 E
X-Bus Interface (XBI)6 N: J7 d- I6 g4 e2 J9 {/ y) T
  SPI Flash support, the operation frequency runs at least 50MHz.
0 }4 D/ ~6 D, ~5 o: I  Addressable Memory range up to 24MB.
! _* z  _/ F5 h+ @6 q7 T6 f  8051 64KB code memory can be mapped into 4 independent 16KB pages.' I  @; E1 L( ^; e( ]5 l
/ `* L1 m8 U" q; G& M
8051 Microprocessor/ x8 Y2 l4 M5 x0 G' l
  Industry 8051 Instruction set complaint with 3~5 cycles per instruction.. o% Y0 K9 g/ K: X2 h' Z
  Programmable 8/16/32 MHz clock
0 _# V" [5 G* g; p7 J* K6 O4 @$ }$ _  Fast instruction fetching from XBI Interface
" \( {' ]( L& d: U  128 bytes and 2KB tightly-coupled SRAM6 o0 ^, U3 `' H0 j( c$ l, K
  24 extended interrupt sources.
( V( p: f- Y! c* f5 |4 l  Two 16-bit tightly-coupled timer
5 R# K' N5 F" L0 n" y8 |& D6 c# n8 T/ U
8042 Keyboard Controller
+ u$ l0 J8 o4 G5 m2 N9 Z  8 Standard keyboard commands processed by hardware/ J* z, @7 k# [" z
  Each hardware command can be optionally processed by firmware
( e  R; n# @/ Q1 }7 C  Q2 B( s- G; f. @' N: k% i
Embedded Controller (EC)
% C  |# _$ Q; R! o* P3 ^  Five EC Standard Commands can be processed by hardware- e! m7 D" ]1 q5 S6 T( X0 N
  ACPI Specification 2.0 compliant+ D7 w- |+ \1 @
  Support customer command by firmware* N. |. |; k' a7 B; K+ ~3 B2 s
  Programmable EC I/O port addressing (default 62h/66h)) j3 i' V$ L2 M. h& g: i

6 P' f$ N$ i. H4 [& YAnalog To Digital Converter (ADC)
0 H  Y( K" j+ {  b6 `0 h1 Y# i  6 built-in ADCs with 8-bit resolution.! f2 u( I1 r5 w# b) V/ o0 H
  The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
$ Z: G0 n- C2 Y; B" ^7 X. a8 o' A2 C$ W% s
Pulse Width Modulator (PWM)# `5 P$ P- k% ]7 [" N# |
  5 built-in PWMs
/ G) U4 W0 e( C! l5 m$ {  Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.) o) M9 q% t! G! O. i  ?
  Configurable cycle time (up to 1 sec) and duty cycle.
. \' j: e7 r$ J( v5 V. ^3 S; s& e9 H9 y/ H
Watchdog Timer (WDT)
2 h( u2 @4 v! o1 c; ^  32.768KHz input clock with 20-bit time scale.
1 r+ K$ F3 G. E  8-bit watchdog timer interrupt and reset setting: Q1 }- t7 e  f* m

. _1 ^0 C4 Z) ~0 Q& \, ~3 MGeneral Purpose Timer (GPT)
2 e' h6 U0 \1 i$ C  Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
# @8 i3 ]+ A( o% D+ E9 h% p4 @1 v% p- Y: o2 _
General Purpose Wake-Up (GPWU)
9 E* D: [5 s" j' j" t& m  All General Purpose Input pins can be configured to generate interrupts or wake-up event.0 G3 f& W, w" W  r: F

" N) N% I& j$ d8 r% q5 |General Purpose Input/Output (GPIO)1 y, n- K# S* p! N  O( N8 |
  All I/O pins are bi-direction and configurable1 o' r+ W% D  F8 {) j' }$ ~7 Q
  All outputs can be optionally tri-stated
  S& P7 P" v' j  All inputs equipped with pull-up, high/low active, edge/level trigger selection1 G" q; u  v$ U
  All GPIO pins are bi-direction, input and output.( Q# O7 _. b+ h6 ~7 q' Q
  Max. 43 GPIOs
' k( Z& p. W$ F& L* _+ t3 w/ a' ~$ N7 u! i6 V
Power Management7 \( W2 C6 ]( |0 {
  Sleep State: 8051 Program Counter (PC) stopped
9 E* h! y, X7 i; F9 [  Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA." }( z+ n4 F# r5 J% h6 Q

& `6 ^! v9 \1 G) N1 b* {8 P1 [Total Pages: 40

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发表于 2008-12-4 12:05:57 | 显示全部楼层
many thanks! 有KB3310的DATASHEET吗?
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发表于 2008-12-4 16:10:26 | 显示全部楼层
Thanks a lot
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发表于 2009-4-9 15:27:40 | 显示全部楼层
这个SPEC还是太简单了,谁知道ENE在用SPI ROM时,prefetch的cache有多大?如果spi run over 50Mhz,我看到它的8051处理指令需要3~5个cycles,而且听说ENE用的免费的C code,那么你们在用的时候感觉perfermance怎么样?特别是处理PS2 device的时候。
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