Programming Interface for Bus Master IDE Controller Revision 1.0

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Programming Interface for Bus Master IDE Controller Revision 1.0
# l' w: s3 z1 v1 g1994/05/16

6 T: V! N% B- W7 w/ I: ~" c: P2 n: RThis document defines a register level programming interface for a bus master ATA compatible (IDE) disk
controller that directly moves data between IDE devices and main memory. By performing the IDE data
. x5 @4 s+ {" ^" M3 k+ ~transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)
and improves system performance in multitasking environments.
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! _; x( h' p7 }+ h# Y; SUntil this specification is ratified, it is solely
owned and maintained by:
Brad Hosler, Intel Corporation
bwh@salem.intel.com (please comment using email)
- A, f' h, v$ Z7 ~; d3 F503-696-8431