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Programming Interface for Bus Master IDE Controller Revision 1.0
# Z% R8 `1 A. ]' f1994/05/16
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' E+ ?! Y1 X9 uThis document defines a register level programming interface for a bus master ATA compatible (IDE) disk
' Y0 I0 S' X& B% |3 @controller that directly moves data between IDE devices and main memory. By performing the IDE data
! _: r) b6 E% d* v& i' H" btransfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)% M" d i& \6 t1 A
and improves system performance in multitasking environments.
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Until this specification is ratified, it is solely9 Z! E4 N8 c" y* W
owned and maintained by:
q! n7 m/ o( ]5 O9 HBrad Hosler, Intel Corporation
+ [1 t( L$ L' F) h( Ebwh@salem.intel.com (please comment using email)( \1 X n# B* N% K$ o
503-696-8431 |
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发表于 2010-7-14 14:53:56
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