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Programming Interface for Bus Master IDE Controller Revision 1.0 W, s4 k) ^3 L; W/ i
1994/05/16
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This document defines a register level programming interface for a bus master ATA compatible (IDE) disk
2 x; |- D" L# p& e; Jcontroller that directly moves data between IDE devices and main memory. By performing the IDE data3 Y- e% @1 h9 S4 k6 o
transfer as a bus master, the Bus Master Device offloads the CPU (no programmed IO for data transfer)/ i( e$ s8 c' h+ m/ h
and improves system performance in multitasking environments., v) k" \4 e4 d* g! v
- \# ], S2 P( a( P' L4 dUntil this specification is ratified, it is solely
, B3 o q+ i: _! yowned and maintained by:; y" w8 f* E$ b! i. k
Brad Hosler, Intel Corporation
) I) F: T0 }) H" Wbwh@salem.intel.com (please comment using email)
3 F5 M, L! a( F- [* A" n7 N8 E2 p503-696-8431 |
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