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Feature Summary- C3 ~5 g, {; k9 d: N
" [/ `" {5 e ^! `0 E& ^ H: d2 TLow Pin Count Host Interface (LPC)
! M+ S& ]9 Y3 N7 A# g SIRQ supporting IRQ1, IRQ12, SCI
+ y J; W6 V5 h5 W1 } I/O Address Decoding:
# r. B9 e' q/ q KBC IO Port 60h/64h
: U; D+ v$ j( c( L1 Q Programmable EC IO Port 62h/66h and 68h/6Ch8 V/ n( B C9 N2 X4 r
Programmable 4-byte Index I/O ports to access internal registers
# _+ u) J# }9 `$ g One Programmable I/O write byte-address decoding
6 J( L6 q! n$ B% B9 ?1 W y: C) V2 _9 n% P* W0 O8 N/ q
X-Bus Interface (XBI)
4 y& {' v; ~3 _* ?, ` SPI Flash support, the operation frequency runs at least 50MHz.4 V7 s6 Z, h( O6 X
Addressable Memory range up to 24MB.4 D* Q8 U& d( }8 S+ r0 c
8051 64KB code memory can be mapped into 4 independent 16KB pages.0 K8 ^, E4 B+ b$ A9 F5 W8 N {! ~
n/ u: J r) G+ g" c8051 Microprocessor, ]+ v# P1 ^; O1 `9 ]& T/ Z& ^6 e# Q
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
1 @ y. Q6 i. [) [ Programmable 8/16/32 MHz clock
$ f* D2 i$ J2 l- i Fast instruction fetching from XBI Interface# W5 K) A/ z/ O) ^
128 bytes and 2KB tightly-coupled SRAM
1 t% W) n* `1 w1 \9 Y8 J 24 extended interrupt sources.& a$ C; |8 v' r+ H3 | y+ {
Two 16-bit tightly-coupled timer8 ]! G2 R+ z! ]$ B
* a' L, v8 V0 Y$ p+ ?0 }; P2 ^ ?& n A+ C
8042 Keyboard Controller
& c8 T& s( h! C! Z3 W 8 Standard keyboard commands processed by hardware& G. F) Q2 ~6 F# f
Each hardware command can be optionally processed by firmware9 o, P" U5 ]: k5 W2 H7 G- E- D
1 m6 c) q8 x+ c& d7 A
Embedded Controller (EC)
' q' D% X/ Q5 s+ u3 v, B6 y. y Five EC Standard Commands can be processed by hardware6 O Z) J& p- `1 b/ L' i
ACPI Specification 2.0 compliant
0 U* K2 r3 t' a" |- o. e) n Support customer command by firmware" `* [% @2 J- ]: I9 }* P: q
Programmable EC I/O port addressing (default 62h/66h)4 R& s/ b' O9 \: h: d
' O4 q4 d' W6 \7 D9 q6 C" m1 IAnalog To Digital Converter (ADC)
7 n/ A" |4 R7 j6 Q0 f( O- [ 6 built-in ADCs with 8-bit resolution.. O. \9 ]3 X |# e% B6 S
The ADC pins can be alternatively configured as General Purpose Inputs (GPI).! n8 N" w7 R# [, `+ W4 B! j
' ]# s* E6 m! o$ @
Pulse Width Modulator (PWM)& M. D; j$ y0 c* t0 F$ V, `0 o% x
5 built-in PWMs: Z* V( r1 }% I z9 w4 h$ |
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.) C2 v& h0 c+ q, l6 ^" c
Configurable cycle time (up to 1 sec) and duty cycle.; Q( E% g# }9 T5 E! P
7 G; H4 H5 |2 N+ N% r8 D, O" `
Watchdog Timer (WDT)! O% }6 z) ^. h( ^0 \' o
32.768KHz input clock with 20-bit time scale.
2 i. j/ Z# `. L$ f. [. F 8-bit watchdog timer interrupt and reset setting
- B2 q6 ^8 e i$ x
* f& V" Q9 S- aGeneral Purpose Timer (GPT)
9 n8 X! u& Y+ W( W. ~ Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
; z& p4 ^2 k$ s- t9 a; d* C9 _1 [) @) M$ t' o5 |7 N" o) P
General Purpose Wake-Up (GPWU)' l( ^6 a( e k" f
All General Purpose Input pins can be configured to generate interrupts or wake-up event.9 w9 K l) U& W# N, J+ x5 r6 R' f
$ l, h+ m% H' b. N' Q* `1 z1 e
General Purpose Input/Output (GPIO)
% U6 G# i9 a, E: E3 z All I/O pins are bi-direction and configurable
7 O& y1 S: E8 `5 c* f All outputs can be optionally tri-stated
- z4 ]( `/ T) S8 \1 z0 H# F# y All inputs equipped with pull-up, high/low active, edge/level trigger selection
: U: e; Z* m0 V' A- p All GPIO pins are bi-direction, input and output. ?" N- I2 p Q" {6 t% d! h
Max. 43 GPIOs
& J, Z2 r6 J0 R2 U* h* L4 R3 }( A
0 v2 h$ l0 m, {1 Q1 p8 a6 X9 b( IPower Management
3 O1 {7 [. p4 c# k Sleep State: 8051 Program Counter (PC) stopped) ^ J* w: n; F; F' z
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
5 r, S# w5 Q( i p, ?0 w
$ d# M$ z$ u$ g1 Z, ATotal Pages: 40 |
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