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ENE KB3700 Keyboard Controller Datasheet R0.1 2006

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发表于 2007-12-21 18:08:39 | 显示全部楼层 |阅读模式
Feature Summary
1 m) Q* Q7 D) J& m' x
/ w# ^' r3 N$ N1 a% m7 q  D4 N& qLow Pin Count Host Interface (LPC)
5 R0 C3 n, x, L! o" w" P  SIRQ supporting IRQ1, IRQ12, SCI
1 Z$ G) A$ s% b6 M# c: s  I/O Address Decoding:! p9 k9 X! e# w' q3 j
  KBC IO Port 60h/64h
7 `( f( b* R/ h7 K" ?  Programmable EC IO Port 62h/66h and 68h/6Ch$ @+ H( L! K! I& |' U3 `
  Programmable 4-byte Index I/O ports to access internal registers
) Y1 o1 J8 l* b  One Programmable I/O write byte-address decoding
! k7 d/ t; h: ?+ b
/ {) Y/ \5 e# P( \X-Bus Interface (XBI)
1 i+ ^- p; P8 q/ m( P. n* C' J" ~  SPI Flash support, the operation frequency runs at least 50MHz./ B0 y& W* m7 r
  Addressable Memory range up to 24MB.9 r; J, C2 |1 i
  8051 64KB code memory can be mapped into 4 independent 16KB pages.
$ R0 M: H: p9 q; n" g% s" n
, O6 u0 m# U( b9 J3 J2 x8051 Microprocessor+ ?+ {! s3 p! L( W  U; Q# v" V
  Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
! t4 m% U0 [& I6 N! w  Programmable 8/16/32 MHz clock
. Z! |7 D* @/ Y9 T- u  Fast instruction fetching from XBI Interface
2 a* h, V0 ^  g2 J) V  128 bytes and 2KB tightly-coupled SRAM
- v* M9 _- J* @- s3 @  24 extended interrupt sources.
9 u: P0 E, E7 A6 W; K4 j  Two 16-bit tightly-coupled timer4 [5 [9 W3 i6 A" Q" D; u% {2 @

+ C5 |/ x9 b) |8 C8042 Keyboard Controller
  {/ h* A7 h7 k- U  8 Standard keyboard commands processed by hardware( U# f( H2 l3 C
  Each hardware command can be optionally processed by firmware6 r( Y  n: @2 {

7 c9 j. A9 Y$ K6 tEmbedded Controller (EC)4 E( Z7 z' c$ @
  Five EC Standard Commands can be processed by hardware/ c2 {# f- @/ o5 R/ W, H
  ACPI Specification 2.0 compliant. G! U6 a% W. H
  Support customer command by firmware# F) c; A7 S8 `" _
  Programmable EC I/O port addressing (default 62h/66h): n% b8 E( P( g" z
. U, a5 F: Z1 P  m# I; E+ C
Analog To Digital Converter (ADC)
, w* s, l8 b8 h7 D* w+ t  6 built-in ADCs with 8-bit resolution.2 I9 M# x' e& Z8 |, F2 H
  The ADC pins can be alternatively configured as General Purpose Inputs (GPI).
1 g% T" ]" s$ i5 ^2 A/ e% ^6 S/ m0 q4 k) K3 |4 o& |
Pulse Width Modulator (PWM)# o3 m& `7 i0 |# W  w# M) [/ H
  5 built-in PWMs! p5 I7 Q2 y* V" B
  Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.( L6 J. U  ]; ~0 ~3 F- U  C) t; G, s
  Configurable cycle time (up to 1 sec) and duty cycle.+ F3 n7 s* [& z  E6 E
! K* @& d/ z, C; K% p5 c
Watchdog Timer (WDT)
8 K4 |5 o$ R) k/ {( o  32.768KHz input clock with 20-bit time scale.& }; \: R: T: B3 x
  8-bit watchdog timer interrupt and reset setting
, }8 M* |+ S7 e$ v5 L2 W- X. b  ~
1 n! ]$ O# ^  L9 O& q- U* W) f' ~General Purpose Timer (GPT)
  b: P8 y9 X6 y7 B8 U8 V/ G6 [, \  Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
) a" {3 Y8 C( D, B8 _3 Y. O2 l' }
General Purpose Wake-Up (GPWU)5 z5 d8 H2 P# K, o1 V
  All General Purpose Input pins can be configured to generate interrupts or wake-up event.
2 Y3 g2 D$ h8 b6 x: \
) r6 r! F" `6 W& }General Purpose Input/Output (GPIO)8 D! P+ ?/ N/ J3 y  ~
  All I/O pins are bi-direction and configurable# l1 V) }3 p" x  x( Q
  All outputs can be optionally tri-stated
% t, _7 g7 {* O  All inputs equipped with pull-up, high/low active, edge/level trigger selection
9 `6 w2 \. S! B) \- l- ~& L0 ^2 [& E  All GPIO pins are bi-direction, input and output.
  x  p1 U" m" N& C# q: }  Max. 43 GPIOs
/ N+ Q( ~. L/ Z- W9 C4 ^, U1 P/ p8 G; G! M
Power Management
; ?( \% v9 b7 _; [; y  Sleep State: 8051 Program Counter (PC) stopped* v$ R! A* Z/ o' X$ {$ g1 N
  Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA., C) H+ Q: |  S5 h$ G8 c
) F2 p9 D: R- n  C" {5 ^8 S
Total Pages: 40

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发表于 2008-12-4 12:05:57 | 显示全部楼层
many thanks! 有KB3310的DATASHEET吗?
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发表于 2008-12-4 16:10:26 | 显示全部楼层
Thanks a lot
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发表于 2009-4-9 15:27:40 | 显示全部楼层
这个SPEC还是太简单了,谁知道ENE在用SPI ROM时,prefetch的cache有多大?如果spi run over 50Mhz,我看到它的8051处理指令需要3~5个cycles,而且听说ENE用的免费的C code,那么你们在用的时候感觉perfermance怎么样?特别是处理PS2 device的时候。
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