|
|
Feature Summary% O9 @3 m& b4 a& ~4 ~/ d9 }
7 ^& P# v+ N* {" j/ r
Low Pin Count Host Interface (LPC)2 {1 r: Y3 O; r; Q) C
SIRQ supporting IRQ1, IRQ12, SCI
: ?1 S% h7 D* v9 N% J( B I/O Address Decoding:
" I9 D9 D* w8 z! ~ U/ g7 W KBC IO Port 60h/64h, D: i9 C3 E! u/ D4 R* d% p
Programmable EC IO Port 62h/66h and 68h/6Ch4 p/ [+ _# B7 E) b0 j) S2 Y
Programmable 4-byte Index I/O ports to access internal registers
* a9 ]/ Z+ Q" y- u: M One Programmable I/O write byte-address decoding7 C- a1 m; E3 N7 j, ]/ ?7 ?
0 X7 ]$ z/ Z' R$ \1 u: z2 IX-Bus Interface (XBI)2 }' q* n7 q8 M' o. @+ Y3 r: f
SPI Flash support, the operation frequency runs at least 50MHz.
& u, q' L# T& B" C" m# k( A8 y Addressable Memory range up to 24MB.6 G+ n' O, U6 Q$ t
8051 64KB code memory can be mapped into 4 independent 16KB pages.7 I% _' ^1 Q3 @+ d
% T3 }7 H2 w6 N! ^6 H- F
8051 Microprocessor8 y2 T$ D- a% y+ f( @
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.* a- D0 V0 V) S- u* s
Programmable 8/16/32 MHz clock
r; n v" j% _- K: j0 k7 c7 s Fast instruction fetching from XBI Interface
) g! L# Y8 Y. ~( o5 C S) T8 F 128 bytes and 2KB tightly-coupled SRAM
- R/ R5 h/ ~+ d5 ^# w' D 24 extended interrupt sources." E( |. R! c; ~5 C& n) U3 R
Two 16-bit tightly-coupled timer, w3 ^7 i, S" z. R" R
- f" M1 t! k* N% [ H8042 Keyboard Controller
% ?; o6 k/ J$ H F* x! I 8 Standard keyboard commands processed by hardware+ h; D J# ^7 A% p" u6 ~
Each hardware command can be optionally processed by firmware
6 f" Y b y6 b: }0 M3 h0 r* |
" }6 [3 Q" z3 j9 t' ~) aEmbedded Controller (EC)1 p! b" x0 Y S% ` _+ \; z
Five EC Standard Commands can be processed by hardware
# H7 O% d L, o$ d- v. B. U Q* C ACPI Specification 2.0 compliant6 C' {) Z5 ~, h1 Y+ _
Support customer command by firmware% q$ K0 ^$ y: I A1 S) t
Programmable EC I/O port addressing (default 62h/66h)
; [4 @: S$ L" q; f Y: u+ E5 g, z/ E, Y% f* W( {/ F$ S
Analog To Digital Converter (ADC)
1 L, y# g( t2 m2 N& c; y1 o5 W4 T 6 built-in ADCs with 8-bit resolution.
" Y) l4 p$ \: r- H3 f The ADC pins can be alternatively configured as General Purpose Inputs (GPI).8 _4 e' {' ^$ L# \7 a
6 Z/ X7 m9 `* G3 e0 g; ] CPulse Width Modulator (PWM)9 Q9 \$ e6 T {3 u y
5 built-in PWMs6 z8 ?8 U" I! v6 ]3 e
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.0 \ B* O. t. `
Configurable cycle time (up to 1 sec) and duty cycle.. T, C/ S) w8 a0 L( @
: f; s9 F! k! P# t1 n% U+ c8 C1 C* {
Watchdog Timer (WDT)1 @ n$ S; N: p
32.768KHz input clock with 20-bit time scale.
+ m0 B; h0 u! ^ 8-bit watchdog timer interrupt and reset setting
, k' ?/ k( F; K9 ?2 d# ^! g
" o8 ], Y! O0 I$ [General Purpose Timer (GPT)
2 w& _ a* c' X; y; i3 A Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution5 ^6 A# m( u2 W7 T4 M# s* n- j; H) j
3 @ ?% s8 b1 W1 S/ W! f' FGeneral Purpose Wake-Up (GPWU)7 T1 X) T) R1 @% `9 B
All General Purpose Input pins can be configured to generate interrupts or wake-up event.* ?$ t' f+ v7 d' { C
# T# C9 g9 x0 {' {; r
General Purpose Input/Output (GPIO)% ^' s- P5 p4 X6 q y# z) S
All I/O pins are bi-direction and configurable
& g) `. h# m6 ?# {2 w: F All outputs can be optionally tri-stated
# K# C: p9 A4 K3 B7 ^' c- L+ T All inputs equipped with pull-up, high/low active, edge/level trigger selection- G7 K! r/ O8 _* |# {) ^
All GPIO pins are bi-direction, input and output.
" q5 E' f N7 U Max. 43 GPIOs6 b! w8 }% x. |0 m; ~1 D* R) t
* t2 l' Z! _" g2 Y+ w% u o4 xPower Management# E# r+ L! t' ~ R$ x* x: l0 ?4 j
Sleep State: 8051 Program Counter (PC) stopped( m: X0 u7 n: _, S5 {
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.* B% I+ L: i8 t
. p1 \8 e6 N! J
Total Pages: 40 |
本帖子中包含更多资源
您需要 登录 才可以下载或查看,没有账号?加入计匠网
×
|