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Feature Summary. E& G8 Z) k7 d
! |! a; u/ r0 }Low Pin Count Host Interface (LPC)8 c s7 I3 ^% P5 `% a" ^8 a
SIRQ supporting IRQ1, IRQ12, SCI7 q2 _8 e; A; {" R- f& b1 I. \6 u" E7 R
I/O Address Decoding:: f/ t( F9 j5 k( f% h# s7 b
KBC IO Port 60h/64h$ k* F% J% m; H! N
Programmable EC IO Port 62h/66h and 68h/6Ch i2 K) u$ _. c Z
Programmable 4-byte Index I/O ports to access internal registers
/ o4 Y2 x9 l2 T* L+ W4 @& } One Programmable I/O write byte-address decoding
6 t; S0 f$ e0 P0 e& l7 ~+ _- l! Z0 F2 @
X-Bus Interface (XBI)
/ ?8 {0 x( r! i+ L4 v" o SPI Flash support, the operation frequency runs at least 50MHz.
2 J, [$ ]+ t" Q c# Z- T Addressable Memory range up to 24MB.
( l; k8 w& f, W, W1 Q% D, _- Y 8051 64KB code memory can be mapped into 4 independent 16KB pages.+ J V3 E3 `2 @# o* }4 t0 C
8 Y$ `; \3 ~$ J8 O4 _
8051 Microprocessor- D. ^, P8 Y% z! B
Industry 8051 Instruction set complaint with 3~5 cycles per instruction.* g: q$ K9 L! d8 L: x* D1 {) _- ~) |
Programmable 8/16/32 MHz clock
" x4 v. H- c- h/ @ Fast instruction fetching from XBI Interface
; ^! M& m" Z) X3 N 128 bytes and 2KB tightly-coupled SRAM) i) }7 l5 I v
24 extended interrupt sources.
# V9 S! P% W7 z- p3 E& r) O; r Two 16-bit tightly-coupled timer
) a, I: F/ @2 \1 N5 w9 k; @
, @& W- _1 t$ v5 P. G& r8042 Keyboard Controller
7 R* R7 _7 C( |3 C6 T7 c' {& P9 P( u 8 Standard keyboard commands processed by hardware
& S. T: ^1 R( p$ x4 U" u$ w Each hardware command can be optionally processed by firmware
. {/ g1 [5 b8 c& x! y6 S$ E# j0 h6 F" t% X, r. I* e; q. h( u: S n
Embedded Controller (EC)/ S* F/ G& A) ?! }
Five EC Standard Commands can be processed by hardware
# ~) E0 j4 ?3 t- ?5 _ ACPI Specification 2.0 compliant9 C+ R m. Y! M1 _* P
Support customer command by firmware* E- n3 L2 Y3 l/ y+ ~! S9 g9 k
Programmable EC I/O port addressing (default 62h/66h)0 g/ p; n/ K5 D; x
; Y1 T0 P' |: l8 L9 d- `Analog To Digital Converter (ADC)! \8 {2 w' N, |- p4 M
6 built-in ADCs with 8-bit resolution.
1 m3 z3 R2 P6 h3 G7 Z) |# t2 p2 l" p The ADC pins can be alternatively configured as General Purpose Inputs (GPI).0 L/ u9 H/ ^) X1 T
+ M, m7 t/ V; ^: j+ I$ ^4 O
Pulse Width Modulator (PWM)
4 ]! L# \" R# }, u0 ` 5 built-in PWMs# R5 R, q; a7 T3 I0 W: ?6 n- o) |
Selectable clock sources: 1MHz/64KHz/4KHz/256Hz.
5 x- N1 r* G ^2 t# H/ n Configurable cycle time (up to 1 sec) and duty cycle.2 Z2 M+ E6 P" S, D! N: H# b
7 B& L C4 [0 Z' m0 y7 [
Watchdog Timer (WDT)/ o) T4 f |2 S" N; \0 F
32.768KHz input clock with 20-bit time scale.
3 U$ W$ L& b/ _& U$ T8 d 8-bit watchdog timer interrupt and reset setting
5 t# W( g4 p; t4 L' h# o# S$ |9 o* C$ j# j6 W M) Q/ A
General Purpose Timer (GPT)9 z2 l' i8 o+ G }
Two 16-bit, two 8-bit general purpose timers with 32.768KHz resolution
3 P0 ]7 _# K% `6 V1 l/ g/ e, p. z4 e+ _5 \% q% r
General Purpose Wake-Up (GPWU)
9 ?; Q0 r2 {% [7 q9 _ All General Purpose Input pins can be configured to generate interrupts or wake-up event.: e$ ?8 V0 g E1 \
5 K+ C8 _7 G6 B$ @General Purpose Input/Output (GPIO)2 }6 j1 X4 R, e$ X
All I/O pins are bi-direction and configurable; ]$ z* n* p0 ]8 R3 {( L
All outputs can be optionally tri-stated
+ L: S1 ^; j9 T8 F All inputs equipped with pull-up, high/low active, edge/level trigger selection3 K. y- j1 K0 r' o
All GPIO pins are bi-direction, input and output.7 s; J- C' [* N6 ?5 R( f% K
Max. 43 GPIOs$ v7 _7 l, C3 W
( S. v- B# h+ S$ ^, Y1 iPower Management& d& q2 U2 \5 e' p
Sleep State: 8051 Program Counter (PC) stopped. [! d- X" ]4 e7 W- y2 m. N
Deep Sleep State: Stop all internal clocks. Target power consumption ~10uA.
" Z& W$ g0 E7 h ~' `+ y. t6 G
) K2 q; y& z4 @3 ETotal Pages: 40 |
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IP卡
狗仔卡
发表于 2007-12-21 18:08:39
提升卡
置顶卡
沉默卡
喧嚣卡
变色卡
显身卡
发表于 2008-12-4 12:05:57