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[请教]BIOS地址映射?

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发表于 2008-4-11 02:56:44 | 显示全部楼层 |阅读模式
原512K的ROM,现换了一个1M的ROM,windows下在 0xFFF0 0000~0xFFF7 FFFF 可以看到追加的512K的内容。# u& K9 W( q, M: g7 b
但在启动计算机时(BIOS没有初始化计算机),无法访问追加的512K的ROM。
' W/ Q2 U' `* `3 N/ }1 c: |(可以访问原512K的ROM 0xFFF8 0000~0xFFFF FFFF)
2 s8 f) n$ I$ Z; O& Q
: X" }8 l, _3 _3 h4 q7 m我的计算机用的是intel的ICH7南桥。
/ P! A3 e) o5 r7 O# o# {在手册上* V. M# d4 k, h' u
FWH_SEL2—Firmware Hub Select 2 Register (LPC I/F—D31:F0). M+ ]5 n1 ~* q" l1 F) y; t' ]
FWH_70_IDSEL — R/W. IDSEL for two, 1-M Firmware Hub memory ranges.+ x4 l) W4 G6 ?8 N7 G6 `/ |& D
The IDSEL programmed in this field addresses the following memory ranges:
; ]# m( G' F" ]- ?4 t8 oFF70 0000h – FF7F FFFFh
' I3 ^; S0 W2 Y/ k' GFF30 0000h – FF3F FFFFh" L) [8 v2 r) s2 l2 U* ]1 z' ?" ^
在这里 IDSEL 如何理解。$ V* ^6 m% z4 y
FWH_DEC_EN1—Firmware Hub Decode Enable Register
! V$ G6 ?) R- L2 i. G1 y. q" d5 {(LPC I/F—D31:F0)9 C0 @) K! D3 I
FWH_70_EN — R/W. Enables decoding two 1-M Firmware Hub memory ranges.% Z: s4 O5 _! a6 p+ b
0 = Disable.
- I. e7 y  t( K, B' ?  E1 = Enable the following ranges for the Firmware Hub: l; Q% g7 ]6 m" \& Y6 j, p
FF70 0000h – FF7F FFFFh6 X7 {- c7 c0 {5 ?! H
FF30 0000h – FF3F FFFFh% n: }) F6 E4 t2 I: m
除了上面的数据区域,还有其它的数据区域控制ROM到内存地址的映射吗?. \6 Q( s( y, X2 T7 h

9 l% @  L1 C: h& X6 b$ v: r. ~谢谢大家了!!!
发表于 2008-4-13 12:26:41 | 显示全部楼层
IDSEL是LPC spec的一个信号(Device Select),6 O; u7 a* R! b. |% Z3 }* o# |! w# T
This one clock field is used to indicate which of multiple Firmware components is being selected.
6 n, w0 {0 |: C3 A/ HThe four bits transmitted over AD[3:0] during this clock are compared with values strapped onto
+ s' i4 L7 l0 rpins on the Firmware component. If there is a match, the Firmware component will continue to
: [- M1 U( W7 Kdecode the cycle to determine which bytes are requested on a read or which bytes to update on a
5 D' @1 t' `5 C$ d: q3 G4 X4 `write. If there isn’t a match, the Firmware component may discard the rest of the cycle and go into
$ s: b4 B% t2 b- E' h5 Q2 ~a standby power state.
  F- E" l4 p  w7 g3 L# g* @
. s2 R" L* c2 ~详见LPC spec:
& b  I) X  o, C- q2 Zhttp://www.intel.com/design/chipsets/industry/25128901.pdf% L# J2 V4 z1 C6 Y6 P

- I3 \  `7 u$ H. }在ICH 7 中似乎就这几个吧(FWH_SEL1,FWH_SEL2,FWH_DEC_EN1,BIOS_CNTL),据我现在知道的.
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