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CPU Reset 后的前100多条指令
1 p7 A3 L! W1 t$ D' X# u测试平台: Intel Menlow Crown Bench CRB/ G6 j+ @6 D/ V" L
BIOS: 自带的 AMI BIOS& n* T T9 {, S# p
/ x0 L6 ~& {$ uBelow is the instruction and registers when CPU reset! _; m& r+ X; P q+ Q: W
F000:0000FFF0 EAAAFF00F0 JMP far16 ptr f000:0000ffaa, W. m4 @3 N0 c# D
EAX = 00000000: AX=0000 AH=00 AL=00
' ]1 @0 h1 B4 }' j9 D6 cEBX = 00000000: BX=0000 BH=00 BL=00 ; P+ f; `3 w* j% x; l
ECX = 00000000: CX=0000 CH=00 CL=00
* p7 J% t: F. _1 W+ GEDX = 000106C0: DX=06C0 DH=06 DL=C0
' m$ Z, P6 A. ~( j8 D2 m! I1 p' kEBP = 00000000: BP=0000 ) D5 o5 d# R' v3 z+ k+ e
ESI = 00000000: SI=0000
% e! E! z% b* d3 o" V. M4 q) qEDI = 00000000: DI=0000 0 D) S1 \: R$ x0 S. g
ESP = 00000000: SP=0000 - ? R5 c# P9 ]% N% j5 B0 {
CS = F000
, O. b x( ]" K0 N; l0 M4 H- P# @DS = 0000; Z0 ^' N5 y8 n P2 L2 S$ h
SS = 0000
9 @4 I) u' B3 r- c/ q% uES = 00003 F8 m/ ?3 @( m2 q4 v$ b# ~( f
FS = 0000
( c' N* C! A1 J) QGS = 0000
& [# V- p+ k# |" H0 i* w# CEIP = 0000FFF0: IP=FFF0 7 U {0 M% ^2 y2 X9 {
EFLAGS = 00000002: FLAGS=0002 ID=0 VIP=0 VIF=0 AC=0 VM=0 RF=0 NT=0 IOPL=0 OF=0 DF=0 INF=0 TF=0 SF=0 ZF=0 AF=0 PF=0 CF=0
' q+ _/ f; M$ W' x5 |) i/ FCR0 = 60000010: PG=0 CD=1 NW=1 AM=0 WP=0 NE=0 ET=1 TS=0 EM=0 MP=0 PE=0
/ A% x9 v& |! y: ~5 PCR2 = 00000000' d- v+ o d+ Y- x
CR3 = 00000000: PCD=0 PWT=0 ; i0 V& K0 |4 S6 p1 Z
CR4 = 00000000: VMXE=0 OSXMMEXCPT=0 OSFXSR=0 PCE=0 PGE=0 MCE=0 PSE=0 PAE=0 DE=0 TSD=0 PVI=0 VME=0 4 A( V+ |! P( Q6 _: m* O" S
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Instruction for CPU step 00
. v7 L* f/ c5 u- u! Q9 cF000:FFAA E9C300 JMP near16 ptr 0070
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Instruction for CPU step 01
5 n( A/ j9 d9 w) C* d/ zF000:0070 E9FD01 JMP near16 ptr 0270% m [/ {7 D% u; F! i/ I& I; O8 C
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Instruction for CPU step 02
4 F" ` m# m. u3 c5 ]5 k, ^F000:0270 FA CLI " y/ W* V4 w7 `4 k1 D* B
# H. n4 a. X/ {4 ~0 O8 k# RInstruction for CPU step 03
, L6 B6 K$ [! w( S1 CF000:0271 FC CLD ( W- N6 l1 o% k5 f# z6 z% y
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Instruction for CPU step 04, E V0 w4 z, x% L8 W1 c" c; e
F000:0272 668BE0 MOV ESP,EAX
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Instruction for CPU step 05% `3 D% F" h$ W5 M9 q/ k, D5 q
F000:0275 8CC8 MOV AX,CS + a2 O/ h2 }5 ?" t
+ d' b: o: B4 HInstruction for CPU step 06
; e" X1 W5 d! d$ Z, r! y. T/ KF000:0277 8ED0 MOV SS,AX # H9 R& B- ~3 B$ Z% ^8 ~
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Instruction for CPU step 073 s& S( {, @+ Z$ b6 j
F000:027C E957FE JMP near16 ptr 00d6: D0 k2 q5 l7 Q
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Instruction for CPU step 08
7 O6 ]& S( K$ L/ pF000:00D6 E9A601 JMP near16 ptr 027f* [1 w" E" g; P' r$ w [1 L
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Instruction for CPU step 09
" _, n) w# p1 J* l6 \4 _$ ZF000:027F B0D0 MOV AL,d0
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Instruction for CPU step 10& {9 {$ K4 c3 v/ y0 @/ R9 O
F000:0281 E680 OUT 80,AL 5 I+ u; z$ v: @! h2 k9 P# O
) t1 T" x4 g W5 u' ZInstruction for CPU step 11
, }, n& T* X" ^; d' I* t% rF000:0283 BF8902 MOV DI,0289 4 M* {: s; \+ J: M! V% @0 [0 J$ x- G
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Instruction for CPU step 12
6 t9 n# g( ]6 G( HF000:0286 E9AE06 JMP near16 ptr 0937
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( ^ U1 F/ D% Y9 GInstruction for CPU step 13/ e/ S f- y5 [" E' o! D
F000:0937 0F08 INVD 8 X, w4 `* i3 _* p4 C. b
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Instruction for CPU step 14 V" J/ X% C; X9 A
F000:0939 0F6EFF MOVD MM7,EDI . p; p, N/ A" W" \, U. H
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Instruction for CPU step 15# s( R! Y- L3 U1 g, R
F000:093C 668BC4 MOV EAX,ESP
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. g3 I: I) A& I) x6 E. CInstruction for CPU step 16
! O5 n; Q2 }$ ^F000:093F E97C08 JMP near16 ptr 11be
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' \; x4 p" f& N0 MInstruction for CPU step 17& ^ k9 i, o0 H2 n. V
F000:11BE E981F7 JMP near16 ptr 0942
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Instruction for CPU step 18: o1 T8 f U% J$ |9 L5 r/ C! @
F000:0942 BF4809 MOV DI,0948
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Instruction for CPU step 19; R0 C, H5 H9 \: F- ]
F000:0945 E9C004 JMP near16 ptr 0e08
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Instruction for CPU step 20
" o8 o" v+ I+ x7 v9 g U( |7 a" J( aF000:0E08 0F20C0 MOV EAX,CR0 + Z: O# @ q) a0 `6 h
! J2 G7 U/ ^' B) C! C, ]Instruction for CPU step 21. s! @1 X+ H) D
F000:0E0B 660D00000060 OR EAX,60000000
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9 ~ F+ e1 z0 M+ v w2 q! cInstruction for CPU step 22/ p; c' r! j) v% B: m4 @/ F
F000:0E11 0F22C0 MOV CR0,EAX
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/ }: h+ f8 n) S# R i7 nInstruction for CPU step 23
4 H0 h0 o! G, I" P; }3 yF000:0E14 0F09 WBINVD
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1 V$ |. W8 `$ [* H7 S$ e/ OInstruction for CPU step 24* a8 j; b: H+ F/ g$ i; z& ^
F000:0E16 66B9FF020000 MOV ECX,000002ff! U& ~0 g1 |6 ^0 D
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Instruction for CPU step 25
* V! U; j5 R( n% CF000:0E1C 0F32 RDMSR ' ^' E2 `/ Q w' e( K
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Instruction for CPU step 26
9 ]; u$ j( g0 i4 m$ m. W* OF000:0E1E 25FFF3 AND AX,f3ff
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: g( z" L; j' `9 J) {% CInstruction for CPU step 27
* N8 a( p4 b0 K& C5 R# a+ cF000:0E21 0F30 WRMSR # t) M& D4 @' S
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Instruction for CPU step 28
5 l% P4 S; P! z7 t2 NF000:0E23 0F09 WBINVD
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Instruction for CPU step 29( }" k2 O G% S
F000:0E25 0F20E0 MOV EAX,CR4 - o9 I5 M" @' X7 w( M
; @8 R# O' L9 [* l$ w6 X( _; q; P, h1 ~8 lInstruction for CPU step 30
5 b* O4 \! P( k. V$ C# a9 dF000:0E28 247F AND AL,7f
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Instruction for CPU step 31
4 g/ d% l% r Q: \, L2 DF000:0E2A 0F22E0 MOV CR4,EAX
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' Q2 T( m5 Q ^9 _7 b5 oInstruction for CPU step 32
+ g3 I3 h! e7 v; O5 w$ F5 M2 |F000:0E2D 0F20D8 MOV EAX,CR3
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Instruction for CPU step 33; v. E9 z, J# X) j+ N8 Z
F000:0E30 0F22D8 MOV CR3,EAX
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Instruction for CPU step 34
' H4 J9 I5 p# {* Q4 W( ~F000:0E33 FFE7 JMP DI
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Instruction for CPU step 35
0 t) k; z) q# e. k* a- e3 B4 jF000:0948 66B9FE000000 MOV ECX,000000fe. t3 o$ E* z m9 W9 N1 `9 C
, u( c& s2 a) D% p' ~" KInstruction for CPU step 369 Z: ]2 p/ N! m1 L) C6 c+ G' v- \
F000:094E 0F32 RDMSR
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, x& y) B! X! e: n6 o, N' IInstruction for CPU step 37# m% S+ D: _+ N+ ~4 D
F000:0950 0FB6D8 MOVZX BX,AL 9 ^; R$ N; f* @( J6 c1 m* Q
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Instruction for CPU step 38
6 m0 N* ~5 G8 i% t8 |$ A+ jF000:0953 6633C0 XOR EAX,EAX D% m1 L) r7 c2 _& U: G
5 D j0 c' ?) j7 o" I$ ~6 f/ PInstruction for CPU step 39+ S9 S& C) r; J3 {5 k9 C: d
F000:0956 668BD0 MOV EDX,EAX 6 v! o9 o2 ]0 u* Y
: Y0 h0 o7 ]% ?) n5 U9 o0 [Instruction for CPU step 40! ~+ j, `: ], w- S6 ^3 T
F000:0959 B95002 MOV CX,0250
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, R1 i% L6 X* O* E$ l- AInstruction for CPU step 41
( }- O/ z* x; v# @# g1 [F000:095C 0F30 WRMSR
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Instruction for CPU step 428 ^# g4 x) b1 j& p: q6 ^; I1 A
F000:095E B95802 MOV CX,0258 - w. X0 a/ t7 A7 R4 g( l
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Instruction for CPU step 43$ q* { ^; H ]8 d5 Q$ y+ P
F000:0961 0F30 WRMSR ; V" H I/ B8 x" D$ y& z, Q* \, L% g
/ J1 a3 Q5 M, L2 H4 B+ b0 UInstruction for CPU step 44. ~- V% a/ k( d( K) \# }, p+ O
F000:0963 B95902 MOV CX,0259
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1 s) d9 v9 }9 D' W, j; l/ hInstruction for CPU step 45% E# S' p+ b- ]7 r% w9 Z
F000:0966 0F30 WRMSR , o* ?- J& V1 d5 G6 {% ]9 C k1 \
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Instruction for CPU step 46
% ~1 k; t$ l4 _# X# \( ^F000:0968 B96802 MOV CX,0268 : a( ]2 j6 i1 l+ a- }
# k3 @) l% O; B: j6 x9 OInstruction for CPU step 47
! {( K" z% Z+ H" x' H4 aF000:096B 0F30 WRMSR
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Instruction for CPU step 486 S( ]( o# m# j2 B
F000:096D B96902 MOV CX,0269 $ F9 p7 `5 n# g- |6 \' A
V m4 H/ V& F4 I8 _) V( m. `+ jInstruction for CPU step 49, e7 q8 E* T, z. u
F000:0970 0F30 WRMSR
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* h2 S/ G* ?8 G- |( xInstruction for CPU step 50
- w$ b3 w3 [/ K1 PF000:0972 B96A02 MOV CX,026a a* @' R+ ^4 H
" p- W+ U" `) e' k5 [# wInstruction for CPU step 51( x" c8 q1 ?7 i0 Y/ r
F000:0975 0F30 WRMSR
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Instruction for CPU step 52
. s, x+ w4 N0 l4 k9 `5 ]% BF000:0977 B96B02 MOV CX,026b " k1 ~; `8 l, e( @1 Q( n+ P3 e$ M
* C; K5 G( q' U* F; cInstruction for CPU step 532 K0 t7 X: q) H# p S, |7 _
F000:097A 0F30 WRMSR 2 I* B0 j1 A: h8 ^
7 X7 S( V; r, BInstruction for CPU step 54* c6 m p. A7 x6 @+ }" g
F000:097C B96C02 MOV CX,026c 9 d; s" H' _$ Y% t
0 N/ y6 s2 P }" H2 p5 k7 iInstruction for CPU step 55
) k7 Y5 q7 ~/ f; H$ pF000:097F 0F30 WRMSR I. H$ p5 `% e" e
' | j. g n. yInstruction for CPU step 56
, i0 m, Q* V. N0 s! A a# uF000:0981 B96D02 MOV CX,026d 1 E/ \( p7 S* g! p8 ~2 S0 V
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Instruction for CPU step 57
}( J1 P0 g, i4 W4 k. [F000:0984 0F30 WRMSR ; O( a0 z+ S7 l Y8 p0 \, a5 P
/ G5 l1 z; H& c4 n1 s2 Q2 oInstruction for CPU step 58
2 ~# b% ^, t9 |1 j! H* R: N: jF000:0986 B96E02 MOV CX,026e $ D* x: H: i2 R2 C+ I! b
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Instruction for CPU step 59
% b; G2 e- v8 _& [F000:0989 0F30 WRMSR
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Instruction for CPU step 600 ^" Z8 [1 X$ l6 F
F000:098B B96F02 MOV CX,026f
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Instruction for CPU step 619 \* r9 f& [" n0 G# Y ` r6 b/ i
F000:098E 0F30 WRMSR / G/ K9 V5 w; t3 l9 n
& x/ N# Y6 J% c# R0 dInstruction for CPU step 62; N `5 i. I, g
F000:0990 D1E3 SAL BX,1 2 k. [$ T5 ] d/ [1 g
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Instruction for CPU step 636 Y& Q6 b9 N* Y$ `7 }( t! @
F000:0992 B90002 MOV CX,0200
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Instruction for CPU step 64& h: A- j- d4 A7 m2 n
F000:0995 4B DEC BX
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& h2 b8 v. Y9 P; n* d& GInstruction for CPU step 65, V8 q% m# C J: y! s$ a' a7 E" I, @: g
F000:0996 0F30 WRMSR
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Instruction for CPU step 66, U; E4 b) a$ w. @
F000:0998 41 INC CX
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( G7 x. V5 c% j4 W6 _Instruction for CPU step 67, _8 c3 ~$ D; x1 Y6 w \- H: R
F000:0999 0BDB OR BX,BX
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' H6 C$ r# r" z& W S3 d9 [Instruction for CPU step 686 E. p: y/ e3 P7 P: l7 @7 _: |7 h
F000:099B 75F8 JNE short ptr 0995" ~: b1 r5 ^# M. y' I% U3 T
* @3 n4 `. T4 B! h" e4 @Instruction for CPU step 692 x) q' R5 ]3 _; X6 D
F000:0995 4B DEC BX
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Instruction for CPU step 70
5 B8 U' w: |9 y. O1 @9 R4 F. ^9 IF000:0996 0F30 WRMSR
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Instruction for CPU step 71: V( `, a, J2 T/ V+ S$ c" p7 Y
F000:0998 41 INC CX ' y/ Q! ~; N$ ]
! Y6 a% b, d y0 a3 H" a; j; k, AInstruction for CPU step 72
$ B; |" Q; [+ g6 I B7 r; i, ]2 {F000:0999 0BDB OR BX,BX . H9 F M; f; e; V
f( X; g# m) j0 a* R% EInstruction for CPU step 73( U2 E$ c) ?/ a$ ^5 s: j1 ^
F000:099B 75F8 JNE short ptr 0995
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( E6 i2 H+ n8 X2 ]) z; }Instruction for CPU step 74
* A5 i& I% M$ \F000:0995 4B DEC BX 5 v [- S/ G- a
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Instruction for CPU step 75
" ^& c, \, Z/ n+ c' U; \. Z" \F000:0996 0F30 WRMSR ! k* j& k& K9 E, J$ F
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Instruction for CPU step 76
) X( F5 I& Z* @" oF000:0998 41 INC CX
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Instruction for CPU step 77/ o. z4 G+ N* d3 a1 I
F000:0999 0BDB OR BX,BX 2 ]$ ]- o: C# r' P: j, ^; d! P
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Instruction for CPU step 78
+ q* o) S' x, _4 \& e/ ]9 Q$ \F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 79
{( `# T5 f# |8 h& I( hF000:0995 4B DEC BX ! I# I5 u4 I; H J2 K7 \
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Instruction for CPU step 80
- j5 M+ W- g# {6 }$ v) E& I5 sF000:0996 0F30 WRMSR ! }9 @* _- z u( j% }9 ^
" [/ b( _' F3 g) h7 v# J. c, QInstruction for CPU step 81
( R* c, v0 z9 R- u! E) LF000:0998 41 INC CX
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; V7 X, z3 k. X0 f, W# L. EInstruction for CPU step 82
/ |$ p- O- g' ^. v O7 gF000:0999 0BDB OR BX,BX
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Instruction for CPU step 83
# D$ a- u) D2 e- c1 Y) T9 JF000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 84
+ J0 _- Y4 ?8 [7 x1 [; T% K tF000:0995 4B DEC BX . d6 i3 c2 v9 `: d* O9 j
, }* p' w% Q# H2 TInstruction for CPU step 85
0 Y7 `; K1 m9 Y, M1 J4 q! K! L1 UF000:0996 0F30 WRMSR 1 T( l3 O$ Y( w D7 ~& J0 [
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Instruction for CPU step 86
6 m/ \9 l3 t8 `) b) }) y5 BF000:0998 41 INC CX
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Instruction for CPU step 875 m- G6 y: D8 M" P
F000:0999 0BDB OR BX,BX 7 ~8 y0 M s/ P6 c$ ^& p( k; r
; A9 X$ O! r7 zInstruction for CPU step 88
. z' F& h) {2 R' X5 zF000:099B 75F8 JNE short ptr 0995
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2 T1 Q8 G/ ^+ Y+ c! F4 q* LInstruction for CPU step 89" g5 f4 n5 a6 l" z% E3 ~
F000:0995 4B DEC BX / a2 ]5 x; ]7 f; a, r
& x2 q: b, Q; U3 G# Z8 ?Instruction for CPU step 907 Z, Z* X/ ?1 g, t1 s2 |
F000:0996 0F30 WRMSR , I1 C/ J" K$ k- f' g" L
! F0 c' M7 [: ?6 L% {' CInstruction for CPU step 91
& Q9 B. t% l N" K8 p+ ]+ KF000:0998 41 INC CX ( f, m4 U. b$ W; w% b4 `2 k% G
7 a3 z# b5 ]' bInstruction for CPU step 92* {3 f0 k8 M) |5 ~
F000:0999 0BDB OR BX,BX $ Z0 d2 q6 |2 [: C& l* `1 f# O3 a( v
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Instruction for CPU step 939 O2 x& T/ i3 ]$ E l' k0 x. l) T
F000:099B 75F8 JNE short ptr 0995
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Instruction for CPU step 942 D6 I* ]& M! a
F000:0995 4B DEC BX % k2 z% g- @2 U6 J
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Instruction for CPU step 95
- y9 S! ?; o8 d( X" NF000:0996 0F30 WRMSR 8 m* T& I% b0 a a$ E N
9 D" u% b; D% b" A* V. ^Instruction for CPU step 96
) V; Q+ h/ F$ B/ X1 l9 s. s5 lF000:0998 41 INC CX / |4 G* k; A0 R! e( h: ]% U
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Instruction for CPU step 97( @& l5 A3 M. Y+ [' F
F000:0999 0BDB OR BX,BX
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9 a4 R6 t- I9 m, E3 KInstruction for CPU step 98
/ K. h+ Y" q$ H5 Y: v3 R: PF000:099B 75F8 JNE short ptr 0995
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5 W# ?+ B1 J/ N6 n3 B5 ?" \Instruction for CPU step 99* F2 V! t7 N7 u" p( Z0 U
F000:0995 4B DEC BX
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Instruction for CPU step 100. y% V2 q g8 D8 A/ U: O
F000:0996 0F30 WRMSR % J$ _! H- z: n: c- g
6 F R" k& _! ~4 ]
Instruction for CPU step 101
0 `* q+ i& x0 t! {2 S( s2 [F000:0998 41 INC CX . z+ H6 z" o' \0 K1 {
0 L' n& l* y( w1 }, J4 `( IInstruction for CPU step 102- z0 l: X" y: A* @' R
F000:0999 0BDB OR BX,BX
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6 P9 p0 O$ M; i2 w. ?Instruction for CPU step 103
# A' y; {$ O, @F000:099B 75F8 JNE short ptr 0995/ `& {* `+ t7 B. K& X
; }. f# k6 t0 H- g/ ^4 TInstruction for CPU step 104
4 m3 t: i! T) `1 T8 CF000:0995 4B DEC BX |
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